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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-09-01 02:02:21 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-09-01 02:02:21 +0000 |
| commit | 51d2d0f668ba2e2b52fc20f44fc4d60005c55a13 (patch) | |
| tree | 7c9b3a31df4620ff71457ac7c1a1b50ef7f46fc3 /llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp | |
| parent | 86f14e09a667735d5bd63b77c1412d8fa322aa29 (diff) | |
| download | bcm5719-llvm-51d2d0f668ba2e2b52fc20f44fc4d60005c55a13.tar.gz bcm5719-llvm-51d2d0f668ba2e2b52fc20f44fc4d60005c55a13.zip | |
AMDGPU: Fix adding redundant implicit operands
These are already added during the MachineInstr construction,
so this was adding the implicit registers twice.
llvm-svn: 246525
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp')
0 files changed, 0 insertions, 0 deletions
