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authorAdam Nemet <anemet@apple.com>2016-01-21 18:28:36 +0000
committerAdam Nemet <anemet@apple.com>2016-01-21 18:28:36 +0000
commitaf761104babba61fb7dc07620a9e89f41f5aabf7 (patch)
treede81c50196ebed654842beed6c2424f5984a05f5 /llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
parentfcdb19904c5da82ee72ce2dc76510e936fcc0bf3 (diff)
downloadbcm5719-llvm-af761104babba61fb7dc07620a9e89f41f5aabf7.tar.gz
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[TTI] Add getCacheLineSize
Summary: And use it in PPCLoopDataPrefetch.cpp. @hfinkel, please let me know if your preference would be to preserve the ppc-loop-prefetch-cache-line option in order to be able to override the value of TTI::getCacheLineSize for PPC. Reviewers: hfinkel Subscribers: hulx2000, mcrosier, mssimpso, hfinkel, llvm-commits Differential Revision: http://reviews.llvm.org/D16306 llvm-svn: 258419
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp')
-rw-r--r--llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp12
1 files changed, 12 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
index cd86dabd5ab..b60c07c3672 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
@@ -21,6 +21,12 @@ using namespace llvm;
static cl::opt<bool> DisablePPCConstHoist("disable-ppc-constant-hoisting",
cl::desc("disable constant hoisting on PPC"), cl::init(false), cl::Hidden);
+// This is currently only used for the data prefetch pass which is only enabled
+// for BG/Q by default.
+static cl::opt<unsigned>
+CacheLineSize("ppc-loop-prefetch-cache-line", cl::Hidden, cl::init(64),
+ cl::desc("The loop prefetch cache line size"));
+
//===----------------------------------------------------------------------===//
//
// PPC cost model.
@@ -230,6 +236,12 @@ unsigned PPCTTIImpl::getRegisterBitWidth(bool Vector) {
}
+unsigned PPCTTIImpl::getCacheLineSize() {
+ // This is currently only used for the data prefetch pass which is only
+ // enabled for BG/Q by default.
+ return CacheLineSize;
+}
+
unsigned PPCTTIImpl::getMaxInterleaveFactor(unsigned VF) {
unsigned Directive = ST->getDarwinDirective();
// The 440 has no SIMD support, but floating-point instructions
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