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| author | Hal Finkel <hfinkel@anl.gov> | 2012-06-08 15:38:21 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2012-06-08 15:38:21 +0000 |
| commit | 96c2d4d945d053804c7dc0749bab81114dfdf809 (patch) | |
| tree | ff8c62edda387e3d3aac964c245d582f907b6712 /llvm/lib/Target/PowerPC/PPCInstr64Bit.td | |
| parent | 59036d2c06f7a88a68fb3eeadb2e315b5bb0cef2 (diff) | |
| download | bcm5719-llvm-96c2d4d945d053804c7dc0749bab81114dfdf809.tar.gz bcm5719-llvm-96c2d4d945d053804c7dc0749bab81114dfdf809.zip | |
Add the PPCCTRLoops pass: a PPC machine-code-level optimization pass to form CTR-based loop branching code.
This pass is derived from the Hexagon HardwareLoops pass. The only significant enhancement over the Hexagon
pass is that PPCCTRLoops will also attempt to delete the replaced add and compare operations if they are
no longer otherwise used. Also, invalid preheader DebugLoc is not used.
llvm-svn: 158204
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCInstr64Bit.td')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstr64Bit.td | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td index 5da8f48507b..30699d27243 100644 --- a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td +++ b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td @@ -229,6 +229,15 @@ def : Pat<(PPCtc_return (i64 texternalsym:$dst), imm:$imm), def : Pat<(PPCtc_return CTRRC8:$dst, imm:$imm), (TCRETURNri8 CTRRC8:$dst, imm:$imm)>; +let isBranch = 1, isTerminator = 1, hasCtrlDep = 1, PPC970_Unit = 7 in { + let Defs = [CTR8], Uses = [CTR8] in { + def BDZ8 : IForm_ext<16, 18, 0, 0, (outs), (ins condbrtarget:$dst), + "bdz $dst", BrB, []>; + def BDNZ8 : IForm_ext<16, 16, 0, 0, (outs), (ins condbrtarget:$dst), + "bdnz $dst", BrB, []>; + } +} + // 64-but CR instructions def MTCRF8 : XFXForm_5<31, 144, (outs crbitm:$FXM), (ins G8RC:$rS), "mtcrf $FXM, $rS", BrMCRX>, |
