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author | Bill Schmidt <wschmidt@linux.vnet.ibm.com> | 2014-07-25 01:55:55 +0000 |
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committer | Bill Schmidt <wschmidt@linux.vnet.ibm.com> | 2014-07-25 01:55:55 +0000 |
commit | c9fa5dd61882c2b272d887abc3a33dae5bbbcedc (patch) | |
tree | ec7dd80fac172ea19ee8f1aa04a1d673b7e7d342 /llvm/lib/Target/PowerPC/PPCISelLowering.h | |
parent | d9474064271271af78c2a1eecec6fe6ccc028918 (diff) | |
download | bcm5719-llvm-c9fa5dd61882c2b272d887abc3a33dae5bbbcedc.tar.gz bcm5719-llvm-c9fa5dd61882c2b272d887abc3a33dae5bbbcedc.zip |
[PATCH][PPC64LE] Correct little-endian usage of vmrgh* and vmrgl*.
Because the PowerPC vmrgh* and vmrgl* instructions have a built-in
big-endian bias, it is necessary to swap their inputs in little-endian
mode when using them to implement a vector shuffle. This was
previously missed in the vector LE implementation.
There was already logic to distinguish between unary and "normal"
vmrg* vector shuffles, so this patch extends that logic to use a third
option: "swapped" vmrg* vector shuffles that are used for little
endian in place of the "normal" ones.
I've updated the vec-shuffle-le.ll test to check for the expected
register ordering on the generated instructions.
This bug was discovered when testing the LE and ELFv2 patches for
safety if they were backported to 3.4. A different vectorization
decision was made in 3.4 than on mainline trunk, and that exposed the
problem. I've verified this fix takes care of that issue.
llvm-svn: 213915
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCISelLowering.h')
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.h b/llvm/lib/Target/PowerPC/PPCISelLowering.h index ae8c300a4ff..2ac82bd475b 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.h +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.h @@ -308,12 +308,12 @@ namespace llvm { /// isVMRGLShuffleMask - Return true if this is a shuffle mask suitable for /// a VRGL* instruction with the specified unit size (1,2 or 4 bytes). bool isVMRGLShuffleMask(ShuffleVectorSDNode *N, unsigned UnitSize, - bool isUnary, SelectionDAG &DAG); + unsigned ShuffleKind, SelectionDAG &DAG); /// isVMRGHShuffleMask - Return true if this is a shuffle mask suitable for /// a VRGH* instruction with the specified unit size (1,2 or 4 bytes). bool isVMRGHShuffleMask(ShuffleVectorSDNode *N, unsigned UnitSize, - bool isUnary, SelectionDAG &DAG); + unsigned ShuffleKind, SelectionDAG &DAG); /// isVSLDOIShuffleMask - If this is a vsldoi shuffle mask, return the shift /// amount, otherwise return -1. |