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| author | Chris Lattner <sabre@nondot.org> | 2006-03-24 07:48:08 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-03-24 07:48:08 +0000 |
| commit | ab882abce85b65c300349a2bebd49ef57fc1f79e (patch) | |
| tree | b9a51e44fb529b28048774b272835710bbce0fb2 /llvm/lib/Target/PowerPC/PPCISelLowering.cpp | |
| parent | 23fd653efd21a93c1e8ef83c3fa61617d89171fd (diff) | |
| download | bcm5719-llvm-ab882abce85b65c300349a2bebd49ef57fc1f79e.tar.gz bcm5719-llvm-ab882abce85b65c300349a2bebd49ef57fc1f79e.zip | |
add support for using vxor to build zero vectors. This implements
Regression/CodeGen/PowerPC/vec_zero.ll
llvm-svn: 27059
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 36 |
1 files changed, 33 insertions, 3 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index d29ec20b2d2..f228cc22b01 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -170,9 +170,6 @@ PPCTargetLowering::PPCTargetLowering(TargetMachine &TM) setOperationAction(ISD::LOAD, (MVT::ValueType)VT, Expand); setOperationAction(ISD::VECTOR_SHUFFLE, (MVT::ValueType)VT, Expand); setOperationAction(ISD::EXTRACT_VECTOR_ELT, (MVT::ValueType)VT, Expand); - - // FIXME: We don't support any BUILD_VECTOR's yet. We should custom expand - // the ones we do, like splat(0.0) and splat(-0.0). setOperationAction(ISD::BUILD_VECTOR, (MVT::ValueType)VT, Expand); } @@ -193,6 +190,9 @@ PPCTargetLowering::PPCTargetLowering(TargetMachine &TM) setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4f32, Custom); setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4i32, Custom); + + setOperationAction(ISD::BUILD_VECTOR, MVT::v4i32, Custom); + setOperationAction(ISD::BUILD_VECTOR, MVT::v4f32, Custom); } setSetCCResultContents(ZeroOrOneSetCCResult); @@ -276,6 +276,26 @@ unsigned PPC::getVSPLTImmediate(SDNode *N) { return cast<ConstantSDNode>(N->getOperand(0))->getValue(); } +/// isZeroVector - Return true if this build_vector is an all-zero vector. +/// +bool PPC::isZeroVector(SDNode *N) { + if (MVT::isInteger(N->getOperand(0).getValueType())) { + for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) + if (!isa<ConstantSDNode>(N->getOperand(i)) || + cast<ConstantSDNode>(N->getOperand(i))->getValue() != 0) + return false; + } else { + assert(MVT::isFloatingPoint(N->getOperand(0).getValueType()) && + "Vector of non-int, non-float values?"); + // See if this is all zeros. + for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) + if (!isa<ConstantFPSDNode>(N->getOperand(i)) || + !cast<ConstantFPSDNode>(N->getOperand(i))->isExactlyValue(0.0)) + return false; + } + return true; +} + /// LowerOperation - Provide custom lowering hooks for some operations. /// @@ -634,6 +654,16 @@ SDOperand PPCTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) { return DAG.getNode(PPCISD::LVE_X, Op.getValueType(), Store, FIdx, DAG.getSrcValue(NULL)); } + case ISD::BUILD_VECTOR: + // If this is a case we can't handle, return null and let the default + // expansion code take care of it. If we CAN select this case, return Op. + + // See if this is all zeros. + // FIXME: We should handle splat(-0.0), and other cases here. + if (PPC::isZeroVector(Op.Val)) + return Op; + return SDOperand(); + case ISD::VECTOR_SHUFFLE: { SDOperand V1 = Op.getOperand(0); SDOperand V2 = Op.getOperand(1); |

