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| author | JF Bastien <jfb@google.com> | 2013-05-17 23:49:01 +0000 |
|---|---|---|
| committer | JF Bastien <jfb@google.com> | 2013-05-17 23:49:01 +0000 |
| commit | 97b08c404cb702c0c3d1c1beea58576245e80698 (patch) | |
| tree | 66be4481c888bea397ce3306dbba275d94ad6e99 /llvm/lib/Target/PowerPC/PPCISelLowering.cpp | |
| parent | 5a9c4fe2723eff2bc89acac30662b621484eb019 (diff) | |
| download | bcm5719-llvm-97b08c404cb702c0c3d1c1beea58576245e80698.tar.gz bcm5719-llvm-97b08c404cb702c0c3d1c1beea58576245e80698.zip | |
Support unaligned load/store on more ARM targets
This patch matches GCC behavior: the code used to only allow unaligned
load/store on ARM for v6+ Darwin, it will now allow unaligned load/store
for v6+ Darwin as well as for v7+ on Linux and NaCl.
The distinction is made because v6 doesn't guarantee support (but LLVM
assumes that Apple controls hardware+kernel and therefore have
conformant v6 CPUs), whereas v7 does provide this guarantee (and
Linux/NaCl behave sanely).
The patch keeps the -arm-strict-align command line option, and adds
-arm-no-strict-align. They behave similarly to GCC's -mstrict-align and
-mnostrict-align.
I originally encountered this discrepancy in FastIsel tests which expect
unaligned load/store generation. Overall this should slightly improve
performance in most cases because of reduced I$ pressure.
llvm-svn: 182175
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCISelLowering.cpp')
0 files changed, 0 insertions, 0 deletions
