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author | Hal Finkel <hfinkel@anl.gov> | 2014-03-26 12:49:28 +0000 |
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committer | Hal Finkel <hfinkel@anl.gov> | 2014-03-26 12:49:28 +0000 |
commit | 732f0f73a732a6dbde036003cbaed24ce58c66a5 (patch) | |
tree | 58d76001d442676ce96d8e1fa4ba6c39a94742e3 /llvm/lib/Target/PowerPC/PPCISelLowering.cpp | |
parent | 16d89fc356ef70e836a7863ccbf4e29ff2b7724c (diff) | |
download | bcm5719-llvm-732f0f73a732a6dbde036003cbaed24ce58c66a5.tar.gz bcm5719-llvm-732f0f73a732a6dbde036003cbaed24ce58c66a5.zip |
[PowerPC] Lower VSELECT using xxsel when VSX is available
With VSX there is a real vector select instruction, and so we should use it.
Note that VSELECT will still scalarize for v2f64 because the corresponding
SetCC result type (v2i64) is not currently a legal type.
llvm-svn: 204801
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCISelLowering.cpp')
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index a35c83c19d5..2cc8f469548 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -550,6 +550,12 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM) setOperationAction(ISD::FDIV, MVT::v2f64, Legal); setOperationAction(ISD::FSQRT, MVT::v2f64, Legal); + setOperationAction(ISD::VSELECT, MVT::v16i8, Legal); + setOperationAction(ISD::VSELECT, MVT::v8i16, Legal); + setOperationAction(ISD::VSELECT, MVT::v4i32, Legal); + setOperationAction(ISD::VSELECT, MVT::v4f32, Legal); + setOperationAction(ISD::VSELECT, MVT::v2f64, Legal); + // Share the Altivec comparison restrictions. setCondCodeAction(ISD::SETUO, MVT::v2f64, Expand); setCondCodeAction(ISD::SETUEQ, MVT::v2f64, Expand); |