diff options
author | Adhemerval Zanella <azanella@linux.vnet.ibm.com> | 2012-10-30 18:29:42 +0000 |
---|---|---|
committer | Adhemerval Zanella <azanella@linux.vnet.ibm.com> | 2012-10-30 18:29:42 +0000 |
commit | 5c043aeb1b3511f17fb048036abb55e5b883b228 (patch) | |
tree | 88ef32a6571e1e20d5bf66dca3a6604625d42205 /llvm/lib/Target/PowerPC/PPCISelLowering.cpp | |
parent | 0665a0f09e6597937766c32e606346baf055a495 (diff) | |
download | bcm5719-llvm-5c043aeb1b3511f17fb048036abb55e5b883b228.tar.gz bcm5719-llvm-5c043aeb1b3511f17fb048036abb55e5b883b228.zip |
PowerPC: Expand FSRQT for vector types
This patch expands FSQRT for floating point vector types when altivec is
used.
llvm-svn: 167034
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCISelLowering.cpp')
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index 8754b2623ce..541bda54d54 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -363,6 +363,12 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM) setOperationAction(ISD::CTTZ_ZERO_UNDEF, VT, Expand); } + for (unsigned i = (unsigned)MVT::FIRST_FP_VECTOR_VALUETYPE; + i <= (unsigned)MVT::LAST_FP_VECTOR_VALUETYPE; ++i) { + MVT::SimpleValueType VT = (MVT::SimpleValueType)i; + setOperationAction(ISD::FSQRT, VT, Expand); + } + // We can custom expand all VECTOR_SHUFFLEs to VPERM, others we can handle // with merges, splats, etc. setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v16i8, Custom); |