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authorEli Friedman <eli.friedman@gmail.com>2011-08-03 21:06:02 +0000
committerEli Friedman <eli.friedman@gmail.com>2011-08-03 21:06:02 +0000
commit30a49e93e3d45e4f4511387ce74bc0e00b7a4870 (patch)
tree80557998e81b2e98bfb95015618d729ecfd1d854 /llvm/lib/Target/PowerPC/PPCISelLowering.cpp
parent16fc2cc9fa18eb20f77695a09e1548cafa6c3e79 (diff)
downloadbcm5719-llvm-30a49e93e3d45e4f4511387ce74bc0e00b7a4870.tar.gz
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New approach to r136737: insert the necessary fences for atomic ops in platform-independent code, since a bunch of platforms (ARM, Mips, PPC, Alpha are the relevant targets here) need to do essentially the same thing.
I think this completes the basic CodeGen for atomicrmw and cmpxchg. llvm-svn: 136813
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCISelLowering.cpp')
-rw-r--r--llvm/lib/Target/PowerPC/PPCISelLowering.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index ff4f1997cca..78a75f96816 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -401,6 +401,8 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM)
if (PPCSubTarget.isDarwin())
setPrefFunctionAlignment(4);
+ setInsertFencesForAtomic(true);
+
computeRegisterProperties();
}
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