diff options
author | Justin Hibbits <jrh29@alumni.cwru.edu> | 2015-01-08 15:47:19 +0000 |
---|---|---|
committer | Justin Hibbits <jrh29@alumni.cwru.edu> | 2015-01-08 15:47:19 +0000 |
commit | 98a532dd8e94f0e66c901b95b515cfde52879ecc (patch) | |
tree | 9042006ab415ee647727ae09d0fc11378cfc97b4 /llvm/lib/Target/PowerPC/PPCFrameLowering.cpp | |
parent | bec6af62b8ca31a8611c08bbcd28b6b5fe6bf313 (diff) | |
download | bcm5719-llvm-98a532dd8e94f0e66c901b95b515cfde52879ecc.tar.gz bcm5719-llvm-98a532dd8e94f0e66c901b95b515cfde52879ecc.zip |
Add saving and restoring of r30 to the prologue and epilogue, respectively
Summary: The PIC additions didn't update the prologue and epilogue code to save and restore r30 (PIC base register). This does that.
Test Plan: Tests updated.
Reviewers: hfinkel
Reviewed By: hfinkel
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D6876
llvm-svn: 225450
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCFrameLowering.cpp')
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCFrameLowering.cpp | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp index a81131b3adc..1dd1e4d3d24 100644 --- a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp @@ -644,6 +644,14 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF) const { .addImm(FPOffset) .addReg(SPReg); + if (isPIC && !isDarwinABI && !isPPC64 && + MF.getInfo<PPCFunctionInfo>()->usesPICBase()) + // FIXME: On PPC32 SVR4, we must not spill before claiming the stackframe. + BuildMI(MBB, MBBI, dl, StoreInst) + .addReg(PPC::R30) + .addImm(-8U) + .addReg(SPReg); + if (HasBP) // FIXME: On PPC32 SVR4, we must not spill before claiming the stackframe. BuildMI(MBB, MBBI, dl, StoreInst) @@ -1003,6 +1011,14 @@ void PPCFrameLowering::emitEpilogue(MachineFunction &MF, .addImm(FPOffset) .addReg(SPReg); + if (isPIC && !isDarwinABI && !isPPC64 && + MF.getInfo<PPCFunctionInfo>()->usesPICBase()) + // FIXME: On PPC32 SVR4, we must not spill before claiming the stackframe. + BuildMI(MBB, MBBI, dl, LoadInst) + .addReg(PPC::R30) + .addImm(-8U) + .addReg(SPReg); + if (HasBP) BuildMI(MBB, MBBI, dl, LoadInst, BPReg) .addImm(BPOffset) |