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| author | Chris Lattner <sabre@nondot.org> | 2006-11-14 18:44:47 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-11-14 18:44:47 +0000 |
| commit | 44dbdbe5cf5e88562bd8816724fb451e408e15ec (patch) | |
| tree | 4b13cf844f9d2b217112dc12050bbedfe19ed8ab /llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp | |
| parent | b542925b22b2d1236eaa61c8f6ff5bbfbae8badf (diff) | |
| download | bcm5719-llvm-44dbdbe5cf5e88562bd8816724fb451e408e15ec.tar.gz bcm5719-llvm-44dbdbe5cf5e88562bd8816724fb451e408e15ec.zip | |
Rework PPC64 calls. Now we have a LR8/CTR8 register which the PPC64 calls
clobber. This allows LR8 to be save/restored correctly as a 64-bit quantity,
instead of handling it as a 32-bit quantity. This unbreaks ppc64 codegen when
the code is actually located above the 4G boundary.
llvm-svn: 31734
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp b/llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp index c321cbcdee6..cc874af039a 100644 --- a/llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp +++ b/llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp @@ -102,6 +102,7 @@ void PPCCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) { case PPC::IMPLICIT_DEF_VRRC: break; // pseudo opcode, no side effects case PPC::MovePCtoLR: + case PPC::MovePCtoLR8: assert(0 && "CodeEmitter does not support MovePCtoLR instruction"); break; } |
