From 44dbdbe5cf5e88562bd8816724fb451e408e15ec Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Tue, 14 Nov 2006 18:44:47 +0000 Subject: Rework PPC64 calls. Now we have a LR8/CTR8 register which the PPC64 calls clobber. This allows LR8 to be save/restored correctly as a 64-bit quantity, instead of handling it as a 32-bit quantity. This unbreaks ppc64 codegen when the code is actually located above the 4G boundary. llvm-svn: 31734 --- llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp | 1 + 1 file changed, 1 insertion(+) (limited to 'llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp') diff --git a/llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp b/llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp index c321cbcdee6..cc874af039a 100644 --- a/llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp +++ b/llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp @@ -102,6 +102,7 @@ void PPCCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) { case PPC::IMPLICIT_DEF_VRRC: break; // pseudo opcode, no side effects case PPC::MovePCtoLR: + case PPC::MovePCtoLR8: assert(0 && "CodeEmitter does not support MovePCtoLR instruction"); break; } -- cgit v1.2.3