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authorFrancis Visoiu Mistrih <francisvm@yahoo.com>2018-02-09 01:14:44 +0000
committerFrancis Visoiu Mistrih <francisvm@yahoo.com>2018-02-09 01:14:44 +0000
commitfb7b14f70d33225a8299db98bff6e99d79f13ae7 (patch)
tree3f4b3ce4ba2abf5581a9a56f06f470156d4b0e5f /llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp
parent79c3255fe4fc61d8b05f3d2993eb807fef8f2cff (diff)
downloadbcm5719-llvm-fb7b14f70d33225a8299db98bff6e99d79f13ae7.tar.gz
bcm5719-llvm-fb7b14f70d33225a8299db98bff6e99d79f13ae7.zip
[CodeGen] Unify the syntax of MBB liveins in MIR and -debug output
Instead of: Live Ins: %r0 %r1 print: liveins: %r0, %r1 llvm-svn: 324694
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp')
-rw-r--r--llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp b/llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp
index 32d801b13de..347f66d1709 100644
--- a/llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp
+++ b/llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp
@@ -60,7 +60,7 @@ namespace llvm {
/// expands to the following machine code:
///
/// %bb.0: derived from LLVM BB %entry
-/// Live Ins: %f1 %f3 %x6
+/// liveins: %f1 %f3 %x6
/// <SNIP1>
/// %0 = COPY %f1; F8RC:%0
/// %5 = CMPLWI killed %4, 0; CRRC:%5 GPRC:%4
@@ -98,7 +98,7 @@ namespace llvm {
/// If all conditions are meet, IR should collapse to:
///
/// %bb.0: derived from LLVM BB %entry
-/// Live Ins: %f1 %f3 %x6
+/// liveins: %f1 %f3 %x6
/// <SNIP1>
/// %0 = COPY %f1; F8RC:%0
/// %5 = CMPLWI killed %4, 0; CRRC:%5 GPRC:%4
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