diff options
| author | Chris Lattner <sabre@nondot.org> | 2005-08-24 23:08:16 +0000 | 
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-08-24 23:08:16 +0000 | 
| commit | a3fbdae51582aac9d02330e64ae469735a230676 (patch) | |
| tree | 35cd1e68e1bc91d823455d16ac2bac10e627865b /llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp | |
| parent | 45e1ce4e28333cb7c98100ebcbd525c11a45deea (diff) | |
| download | bcm5719-llvm-a3fbdae51582aac9d02330e64ae469735a230676.tar.gz bcm5719-llvm-a3fbdae51582aac9d02330e64ae469735a230676.zip | |
Split IMPLICIT_DEF into IMPLICIT_DEF_GPR and IMPLICIT_DEF_FP, so that the
instructions take a consistent reg class.  Implement ISD::UNDEF in the dag->dag
selector to generate this, fixing UnitTests/2003-07-06-IntOverflow.
llvm-svn: 23028
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp | 12 | 
1 files changed, 9 insertions, 3 deletions
| diff --git a/llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp b/llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp index 4e753d1d1b4..22082a45f0b 100644 --- a/llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp +++ b/llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp @@ -830,7 +830,10 @@ unsigned ISel::SelectExpr(SDOperand N, bool Recording) {      Node->dump(); std::cerr << '\n';      assert(0 && "Node not handled!\n");    case ISD::UNDEF: -    BuildMI(BB, PPC::IMPLICIT_DEF, 0, Result); +    if (Node->getValueType(0) == MVT::i32) +      BuildMI(BB, PPC::IMPLICIT_DEF_GPR, 0, Result); +    else +      BuildMI(BB, PPC::IMPLICIT_DEF_FP, 0, Result);      return Result;    case ISD::DYNAMIC_STACKALLOC:      // Generate both result values.  FIXME: Need a better commment here? @@ -1872,8 +1875,11 @@ void ISel::Select(SDOperand N) {      return;    case ISD::ImplicitDef:      Select(N.getOperand(0)); -    BuildMI(BB, PPC::IMPLICIT_DEF, 0, -            cast<RegisterSDNode>(N.getOperand(1))->getReg()); +    Tmp1 = cast<RegisterSDNode>(N.getOperand(1))->getReg(); +    if (N.getOperand(1).getValueType() == MVT::i32) +      BuildMI(BB, PPC::IMPLICIT_DEF_GPR, 0, Tmp1); +    else +      BuildMI(BB, PPC::IMPLICIT_DEF_FP, 0, Tmp1);      return;    case ISD::RET:      switch (N.getNumOperands()) { | 

