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authorChris Lattner <sabre@nondot.org>2005-04-30 04:26:06 +0000
committerChris Lattner <sabre@nondot.org>2005-04-30 04:26:06 +0000
commit9c6bbafc15aaea7251f4b99b721587bfff45d0e7 (patch)
tree892d498c522b71261cb0b1613c4d1502d65b8364 /llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp
parentdb68d39a01e48fafcb07ee82ac0a8a4c5f2e6a65 (diff)
downloadbcm5719-llvm-9c6bbafc15aaea7251f4b99b721587bfff45d0e7.tar.gz
bcm5719-llvm-9c6bbafc15aaea7251f4b99b721587bfff45d0e7.zip
This target doesn't support the FSIN/FCOS/FSQRT nodes yet
llvm-svn: 21633
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp')
-rw-r--r--llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp8
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp b/llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp
index 40a2610f2cd..a5732f05767 100644
--- a/llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp
+++ b/llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp
@@ -61,6 +61,14 @@ namespace {
setOperationAction(ISD::SREM, MVT::i32, Expand);
setOperationAction(ISD::UREM, MVT::i32, Expand);
+ // We don't support sin/cos/sqrt
+ setOperationAction(ISD::FSIN , MVT::f64, Expand);
+ setOperationAction(ISD::FCOS , MVT::f64, Expand);
+ setOperationAction(ISD::FSQRT, MVT::f64, Expand);
+ setOperationAction(ISD::FSIN , MVT::f32, Expand);
+ setOperationAction(ISD::FCOS , MVT::f32, Expand);
+ setOperationAction(ISD::FSQRT, MVT::f32, Expand);
+
setSetCCResultContents(ZeroOrOneSetCCResult);
addLegalFPImmediate(+0.0); // Necessary for FSEL
addLegalFPImmediate(-0.0); //
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