diff options
author | Eric Christopher <echristo@gmail.com> | 2014-08-05 02:39:49 +0000 |
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committer | Eric Christopher <echristo@gmail.com> | 2014-08-05 02:39:49 +0000 |
commit | fc6de428c8ab10330e1b00c6541503cfd98a9cca (patch) | |
tree | a2f2e256682f7ec9c6affef81490a88327f6844c /llvm/lib/Target/Mips/MipsSEFrameLowering.cpp | |
parent | 5beccb22bc151a6711e28a893ed1446ccae7ba13 (diff) | |
download | bcm5719-llvm-fc6de428c8ab10330e1b00c6541503cfd98a9cca.tar.gz bcm5719-llvm-fc6de428c8ab10330e1b00c6541503cfd98a9cca.zip |
Have MachineFunction cache a pointer to the subtarget to make lookups
shorter/easier and have the DAG use that to do the same lookup. This
can be used in the future for TargetMachine based caching lookups from
the MachineFunction easily.
Update the MIPS subtarget switching machinery to update this pointer
at the same time it runs.
llvm-svn: 214838
Diffstat (limited to 'llvm/lib/Target/Mips/MipsSEFrameLowering.cpp')
-rw-r--r-- | llvm/lib/Target/Mips/MipsSEFrameLowering.cpp | 62 |
1 files changed, 23 insertions, 39 deletions
diff --git a/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp b/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp index ad1af80c074..67f96d16fd0 100644 --- a/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp +++ b/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp @@ -147,11 +147,9 @@ void ExpandPseudo::expandLoadCCond(MachineBasicBlock &MBB, Iter I) { assert(I->getOperand(0).isReg() && I->getOperand(1).isFI()); const MipsSEInstrInfo &TII = - *static_cast<const MipsSEInstrInfo *>( - MF.getTarget().getSubtargetImpl()->getInstrInfo()); - const MipsRegisterInfo &RegInfo = - *static_cast<const MipsRegisterInfo *>( - MF.getTarget().getSubtargetImpl()->getRegisterInfo()); + *static_cast<const MipsSEInstrInfo *>(MF.getSubtarget().getInstrInfo()); + const MipsRegisterInfo &RegInfo = *static_cast<const MipsRegisterInfo *>( + MF.getSubtarget().getRegisterInfo()); const TargetRegisterClass *RC = RegInfo.intRegClass(4); unsigned VR = MRI.createVirtualRegister(RC); @@ -169,11 +167,9 @@ void ExpandPseudo::expandStoreCCond(MachineBasicBlock &MBB, Iter I) { assert(I->getOperand(0).isReg() && I->getOperand(1).isFI()); const MipsSEInstrInfo &TII = - *static_cast<const MipsSEInstrInfo *>( - MF.getTarget().getSubtargetImpl()->getInstrInfo()); - const MipsRegisterInfo &RegInfo = - *static_cast<const MipsRegisterInfo *>( - MF.getTarget().getSubtargetImpl()->getRegisterInfo()); + *static_cast<const MipsSEInstrInfo *>(MF.getSubtarget().getInstrInfo()); + const MipsRegisterInfo &RegInfo = *static_cast<const MipsRegisterInfo *>( + MF.getSubtarget().getRegisterInfo()); const TargetRegisterClass *RC = RegInfo.intRegClass(4); unsigned VR = MRI.createVirtualRegister(RC); @@ -194,11 +190,9 @@ void ExpandPseudo::expandLoadACC(MachineBasicBlock &MBB, Iter I, assert(I->getOperand(0).isReg() && I->getOperand(1).isFI()); const MipsSEInstrInfo &TII = - *static_cast<const MipsSEInstrInfo *>( - MF.getTarget().getSubtargetImpl()->getInstrInfo()); - const MipsRegisterInfo &RegInfo = - *static_cast<const MipsRegisterInfo *>( - MF.getTarget().getSubtargetImpl()->getRegisterInfo()); + *static_cast<const MipsSEInstrInfo *>(MF.getSubtarget().getInstrInfo()); + const MipsRegisterInfo &RegInfo = *static_cast<const MipsRegisterInfo *>( + MF.getSubtarget().getRegisterInfo()); const TargetRegisterClass *RC = RegInfo.intRegClass(RegSize); unsigned VR0 = MRI.createVirtualRegister(RC); @@ -226,11 +220,9 @@ void ExpandPseudo::expandStoreACC(MachineBasicBlock &MBB, Iter I, assert(I->getOperand(0).isReg() && I->getOperand(1).isFI()); const MipsSEInstrInfo &TII = - *static_cast<const MipsSEInstrInfo *>( - MF.getTarget().getSubtargetImpl()->getInstrInfo()); - const MipsRegisterInfo &RegInfo = - *static_cast<const MipsRegisterInfo *>( - MF.getTarget().getSubtargetImpl()->getRegisterInfo()); + *static_cast<const MipsSEInstrInfo *>(MF.getSubtarget().getInstrInfo()); + const MipsRegisterInfo &RegInfo = *static_cast<const MipsRegisterInfo *>( + MF.getSubtarget().getRegisterInfo()); const TargetRegisterClass *RC = RegInfo.intRegClass(RegSize); unsigned VR0 = MRI.createVirtualRegister(RC); @@ -263,11 +255,9 @@ bool ExpandPseudo::expandCopyACC(MachineBasicBlock &MBB, Iter I, // copy dst_hi, $vr1 const MipsSEInstrInfo &TII = - *static_cast<const MipsSEInstrInfo *>( - MF.getTarget().getSubtargetImpl()->getInstrInfo()); - const MipsRegisterInfo &RegInfo = - *static_cast<const MipsRegisterInfo *>( - MF.getTarget().getSubtargetImpl()->getRegisterInfo()); + *static_cast<const MipsSEInstrInfo *>(MF.getSubtarget().getInstrInfo()); + const MipsRegisterInfo &RegInfo = *static_cast<const MipsRegisterInfo *>( + MF.getSubtarget().getRegisterInfo()); unsigned Dst = I->getOperand(0).getReg(), Src = I->getOperand(1).getReg(); unsigned VRegSize = RegInfo.getMinimalPhysRegClass(Dst)->getSize() / 2; @@ -422,11 +412,9 @@ void MipsSEFrameLowering::emitPrologue(MachineFunction &MF) const { MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>(); const MipsSEInstrInfo &TII = - *static_cast<const MipsSEInstrInfo *>( - MF.getTarget().getSubtargetImpl()->getInstrInfo()); - const MipsRegisterInfo &RegInfo = - *static_cast<const MipsRegisterInfo *>( - MF.getTarget().getSubtargetImpl()->getRegisterInfo()); + *static_cast<const MipsSEInstrInfo *>(MF.getSubtarget().getInstrInfo()); + const MipsRegisterInfo &RegInfo = *static_cast<const MipsRegisterInfo *>( + MF.getSubtarget().getRegisterInfo()); MachineBasicBlock::iterator MBBI = MBB.begin(); DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); @@ -559,11 +547,9 @@ void MipsSEFrameLowering::emitEpilogue(MachineFunction &MF, MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>(); const MipsSEInstrInfo &TII = - *static_cast<const MipsSEInstrInfo *>( - MF.getTarget().getSubtargetImpl()->getInstrInfo()); - const MipsRegisterInfo &RegInfo = - *static_cast<const MipsRegisterInfo *>( - MF.getTarget().getSubtargetImpl()->getRegisterInfo()); + *static_cast<const MipsSEInstrInfo *>(MF.getSubtarget().getInstrInfo()); + const MipsRegisterInfo &RegInfo = *static_cast<const MipsRegisterInfo *>( + MF.getSubtarget().getRegisterInfo()); DebugLoc dl = MBBI->getDebugLoc(); unsigned SP = STI.isABI_N64() ? Mips::SP_64 : Mips::SP; @@ -616,8 +602,7 @@ spillCalleeSavedRegisters(MachineBasicBlock &MBB, const TargetRegisterInfo *TRI) const { MachineFunction *MF = MBB.getParent(); MachineBasicBlock *EntryBlock = MF->begin(); - const TargetInstrInfo &TII = - *MF->getTarget().getSubtargetImpl()->getInstrInfo(); + const TargetInstrInfo &TII = *MF->getSubtarget().getInstrInfo(); for (unsigned i = 0, e = CSI.size(); i != e; ++i) { // Add the callee-saved register as live-in. Do not add if the register is @@ -658,8 +643,7 @@ void MipsSEFrameLowering:: eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const { const MipsSEInstrInfo &TII = - *static_cast<const MipsSEInstrInfo *>( - MF.getTarget().getSubtargetImpl()->getInstrInfo()); + *static_cast<const MipsSEInstrInfo *>(MF.getSubtarget().getInstrInfo()); if (!hasReservedCallFrame(MF)) { int64_t Amount = I->getOperand(0).getImm(); |