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author | Daniel Sanders <daniel.sanders@imgtec.com> | 2015-09-15 16:17:27 +0000 |
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committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2015-09-15 16:17:27 +0000 |
commit | 50f17235dd45e7023dda46cba0ea15ce1ef3f6f0 (patch) | |
tree | 71b2f96146d2527596bd82be6357fe5c435369e0 /llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h | |
parent | e9434e80d141d754cdf7efc6cf3b7ca311ca2750 (diff) | |
download | bcm5719-llvm-50f17235dd45e7023dda46cba0ea15ce1ef3f6f0.tar.gz bcm5719-llvm-50f17235dd45e7023dda46cba0ea15ce1ef3f6f0.zip |
Revert r247692: Replace Triple with a new TargetTuple in MCTargetDesc/* and related. NFC.
Eric has replied and has demanded the patch be reverted.
llvm-svn: 247702
Diffstat (limited to 'llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h')
-rw-r--r-- | llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h index 13f6e4045b0..4069d7d184e 100644 --- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h +++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h @@ -26,7 +26,7 @@ class MCRegisterInfo; class MCSubtargetInfo; class StringRef; class Target; -class TargetTuple; +class Triple; class raw_ostream; class raw_pwrite_stream; @@ -44,22 +44,22 @@ MCCodeEmitter *createMipsMCCodeEmitterEL(const MCInstrInfo &MCII, MCAsmBackend *createMipsAsmBackendEB32(const Target &T, const MCRegisterInfo &MRI, - const TargetTuple &TT, StringRef CPU); + const Triple &TT, StringRef CPU); MCAsmBackend *createMipsAsmBackendEL32(const Target &T, const MCRegisterInfo &MRI, - const TargetTuple &TT, StringRef CPU); + const Triple &TT, StringRef CPU); MCAsmBackend *createMipsAsmBackendEB64(const Target &T, const MCRegisterInfo &MRI, - const TargetTuple &TT, StringRef CPU); + const Triple &TT, StringRef CPU); MCAsmBackend *createMipsAsmBackendEL64(const Target &T, const MCRegisterInfo &MRI, - const TargetTuple &TT, StringRef CPU); + const Triple &TT, StringRef CPU); MCObjectWriter *createMipsELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI, bool IsLittleEndian, bool Is64Bit); namespace MIPS_MC { -StringRef selectMipsCPU(const TargetTuple &TT, StringRef CPU); +StringRef selectMipsCPU(const Triple &TT, StringRef CPU); } } // End llvm namespace |