summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
diff options
context:
space:
mode:
authorHrvoje Varga <Hrvoje.Varga@imgtec.com>2016-05-12 12:46:06 +0000
committerHrvoje Varga <Hrvoje.Varga@imgtec.com>2016-05-12 12:46:06 +0000
commitcf6a78192ba35ef43662558abe121a945e9dd617 (patch)
treee79254b942cc2eb4588596c5f4b37d3250d9dac3 /llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
parent2615c9e535225994eb75d1b35effe092a7ac6293 (diff)
downloadbcm5719-llvm-cf6a78192ba35ef43662558abe121a945e9dd617.tar.gz
bcm5719-llvm-cf6a78192ba35ef43662558abe121a945e9dd617.zip
Revert "[mips][microMIPS] Implement CFC*, CTC* and LDC* instructions"
This reverts commit r269176 as it caused test-suite failure. llvm-svn: 269287
Diffstat (limited to 'llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp')
-rw-r--r--llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp13
1 files changed, 0 insertions, 13 deletions
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
index 5bc453bc3d6..57b087d0006 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
@@ -753,19 +753,6 @@ getMemEncodingMMImm9(const MCInst &MI, unsigned OpNo,
}
unsigned MipsMCCodeEmitter::
-getMemEncodingMMImm11(const MCInst &MI, unsigned OpNo,
- SmallVectorImpl<MCFixup> &Fixups,
- const MCSubtargetInfo &STI) const {
- // Base register is encoded in bits 20-16, offset is encoded in bits 10-0.
- assert(MI.getOperand(OpNo).isReg());
- unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups,
- STI) << 16;
- unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI);
-
- return (OffBits & 0x07FF) | RegBits;
-}
-
-unsigned MipsMCCodeEmitter::
getMemEncodingMMImm12(const MCInst &MI, unsigned OpNo,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const {
OpenPOWER on IntegriCloud