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| author | Hrvoje Varga <Hrvoje.Varga@imgtec.com> | 2016-05-12 12:46:06 +0000 |
|---|---|---|
| committer | Hrvoje Varga <Hrvoje.Varga@imgtec.com> | 2016-05-12 12:46:06 +0000 |
| commit | cf6a78192ba35ef43662558abe121a945e9dd617 (patch) | |
| tree | e79254b942cc2eb4588596c5f4b37d3250d9dac3 /llvm/lib/Target/Mips/Disassembler | |
| parent | 2615c9e535225994eb75d1b35effe092a7ac6293 (diff) | |
| download | bcm5719-llvm-cf6a78192ba35ef43662558abe121a945e9dd617.tar.gz bcm5719-llvm-cf6a78192ba35ef43662558abe121a945e9dd617.zip | |
Revert "[mips][microMIPS] Implement CFC*, CTC* and LDC* instructions"
This reverts commit r269176 as it caused test-suite failure.
llvm-svn: 269287
Diffstat (limited to 'llvm/lib/Target/Mips/Disassembler')
| -rw-r--r-- | llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp | 40 |
1 files changed, 0 insertions, 40 deletions
diff --git a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp index 99cb6dcd436..c77cc47e1af 100644 --- a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp +++ b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp @@ -341,10 +341,6 @@ static DecodeStatus DecodeFMem(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder); -static DecodeStatus DecodeFMemMMR6(MCInst &Inst, unsigned Insn, - uint64_t Address, - const void *Decoder); - static DecodeStatus DecodeFMem2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder); @@ -357,10 +353,6 @@ static DecodeStatus DecodeFMemCop2R6(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder); -static DecodeStatus DecodeFMemCop2MMR6(MCInst &Inst, unsigned Insn, - uint64_t Address, - const void *Decoder); - static DecodeStatus DecodeSpecial3LlSc(MCInst &Inst, unsigned Insn, uint64_t Address, @@ -1607,22 +1599,6 @@ static DecodeStatus DecodeFMem(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeFMemMMR6(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { - int Offset = SignExtend32<16>(Insn & 0xffff); - unsigned Base = fieldFromInstruction(Insn, 16, 5); - unsigned Reg = fieldFromInstruction(Insn, 21, 5); - - Reg = getReg(Decoder, Mips::FGR64RegClassID, Reg); - Base = getReg(Decoder, Mips::GPR32RegClassID, Base); - - Inst.addOperand(MCOperand::createReg(Reg)); - Inst.addOperand(MCOperand::createReg(Base)); - Inst.addOperand(MCOperand::createImm(Offset)); - - return MCDisassembler::Success; -} - static DecodeStatus DecodeFMem2(MCInst &Inst, unsigned Insn, uint64_t Address, @@ -1676,22 +1652,6 @@ static DecodeStatus DecodeFMemCop2R6(MCInst &Inst, return MCDisassembler::Success; } - -static DecodeStatus DecodeFMemCop2MMR6(MCInst &Inst, unsigned Insn, - uint64_t Address, const void *Decoder) { - int Offset = SignExtend32<11>(Insn & 0x07ff); - unsigned Reg = fieldFromInstruction(Insn, 21, 5); - unsigned Base = fieldFromInstruction(Insn, 16, 5); - - Reg = getReg(Decoder, Mips::COP2RegClassID, Reg); - Base = getReg(Decoder, Mips::GPR32RegClassID, Base); - - Inst.addOperand(MCOperand::createReg(Reg)); - Inst.addOperand(MCOperand::createReg(Base)); - Inst.addOperand(MCOperand::createImm(Offset)); - - return MCDisassembler::Success; -} static DecodeStatus DecodeSpecial3LlSc(MCInst &Inst, unsigned Insn, uint64_t Address, |
