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author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2016-11-06 19:36:09 +0000 |
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committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2016-11-06 19:36:09 +0000 |
commit | f8d38d11b9323d875b85623193940b117c1ec4fa (patch) | |
tree | 6a2064f8125a8a6135bf65b3d9510836126f1daf /llvm/lib/Target/Hexagon/HexagonPatterns.td | |
parent | 9e3520c884b1a29ed3e5d10211f63f8d377db15b (diff) | |
download | bcm5719-llvm-f8d38d11b9323d875b85623193940b117c1ec4fa.tar.gz bcm5719-llvm-f8d38d11b9323d875b85623193940b117c1ec4fa.zip |
Revert r286080: it breaks build bots
llvm-svn: 286081
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonPatterns.td')
-rw-r--r-- | llvm/lib/Target/Hexagon/HexagonPatterns.td | 117 |
1 files changed, 20 insertions, 97 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonPatterns.td b/llvm/lib/Target/Hexagon/HexagonPatterns.td index f46a55890af..bce46efb018 100644 --- a/llvm/lib/Target/Hexagon/HexagonPatterns.td +++ b/llvm/lib/Target/Hexagon/HexagonPatterns.td @@ -24,34 +24,9 @@ def IsPow2_32 : PatLeaf<(i32 imm), [{ return isPowerOf2_32(V); }]>; -def IsPow2_64 : PatLeaf<(i64 imm), [{ - uint64_t V = N->getZExtValue(); - return isPowerOf2_64(V); -}]>; - def IsNPow2_32 : PatLeaf<(i32 imm), [{ - uint32_t NV = ~N->getZExtValue(); - return isPowerOf2_32(NV); -}]>; - -def IsPow2_64L : PatLeaf<(i64 imm), [{ - uint64_t V = N->getZExtValue(); - return isPowerOf2_64(V) && Log2_64(V) < 32; -}]>; - -def IsPow2_64H : PatLeaf<(i64 imm), [{ - uint64_t V = N->getZExtValue(); - return isPowerOf2_64(V) && Log2_64(V) >= 32; -}]>; - -def IsNPow2_64L : PatLeaf<(i64 imm), [{ - uint64_t NV = ~N->getZExtValue(); - return isPowerOf2_64(NV) && Log2_64(NV) < 32; -}]>; - -def IsNPow2_64H : PatLeaf<(i64 imm), [{ - uint64_t NV = ~N->getZExtValue(); - return isPowerOf2_64(NV) && Log2_64(NV) >= 32; + uint32_t V = N->getZExtValue(); + return isPowerOf2_32(~V); }]>; def SDEC1 : SDNodeXForm<imm, [{ @@ -61,36 +36,15 @@ def SDEC1 : SDNodeXForm<imm, [{ def UDEC1 : SDNodeXForm<imm, [{ uint32_t V = N->getZExtValue(); - assert(V >= 1); + assert(V > 0); return CurDAG->getTargetConstant(V-1, SDLoc(N), MVT::i32); }]>; -def UDEC32 : SDNodeXForm<imm, [{ - uint32_t V = N->getZExtValue(); - assert(V >= 32); - return CurDAG->getTargetConstant(V-32, SDLoc(N), MVT::i32); -}]>; - def Log2_32 : SDNodeXForm<imm, [{ uint32_t V = N->getZExtValue(); return CurDAG->getTargetConstant(Log2_32(V), SDLoc(N), MVT::i32); }]>; -def Log2_64 : SDNodeXForm<imm, [{ - uint64_t V = N->getZExtValue(); - return CurDAG->getTargetConstant(Log2_64(V), SDLoc(N), MVT::i32); -}]>; - -def LogN2_32 : SDNodeXForm<imm, [{ - uint32_t NV = ~N->getZExtValue(); - return CurDAG->getTargetConstant(Log2_32(NV), SDLoc(N), MVT::i32); -}]>; - -def LogN2_64 : SDNodeXForm<imm, [{ - uint64_t NV = ~N->getZExtValue(); - return CurDAG->getTargetConstant(Log2_64(NV), SDLoc(N), MVT::i32); -}]>; - class T_CMP_pat <InstHexagon MI, PatFrag OpNode, PatLeaf ImmPred> : Pat<(i1 (OpNode I32:$src1, ImmPred:$src2)), @@ -574,54 +528,18 @@ def: Pat<(i32 (trunc (ctlz (not I64:$Rss)))), (S2_cl1p I64:$Rss)>; // Count trailing ones: 32-bit. def: Pat<(cttz (not I32:$Rs)), (S2_ct1 I32:$Rs)>; -let AddedComplexity = 20 in { // Complexity greater than and/or/xor - def: Pat<(and I32:$Rs, IsNPow2_32:$V), - (S2_clrbit_i IntRegs:$Rs, (LogN2_32 $V))>; - def: Pat<(or I32:$Rs, IsPow2_32:$V), - (S2_setbit_i IntRegs:$Rs, (Log2_32 $V))>; - def: Pat<(xor I32:$Rs, IsPow2_32:$V), - (S2_togglebit_i IntRegs:$Rs, (Log2_32 $V))>; - - def: Pat<(and I32:$Rs, (not (shl 1, I32:$Rt))), - (S2_clrbit_r IntRegs:$Rs, IntRegs:$Rt)>; - def: Pat<(or I32:$Rs, (shl 1, I32:$Rt)), - (S2_setbit_r IntRegs:$Rs, IntRegs:$Rt)>; - def: Pat<(xor I32:$Rs, (shl 1, I32:$Rt)), - (S2_togglebit_r IntRegs:$Rs, IntRegs:$Rt)>; -} - -// Clr/set/toggle bit for 64-bit values with immediate bit index. -let AddedComplexity = 20 in { // Complexity greater than and/or/xor - def: Pat<(and I64:$Rss, IsNPow2_64L:$V), - (REG_SEQUENCE DoubleRegs, - (i32 (HiReg $Rss)), subreg_hireg, - (S2_clrbit_i (LoReg $Rss), (LogN2_64 $V)), subreg_loreg)>; - def: Pat<(and I64:$Rss, IsNPow2_64H:$V), - (REG_SEQUENCE DoubleRegs, - (S2_clrbit_i (HiReg $Rss), (UDEC32 (i32 (LogN2_64 $V)))), - subreg_hireg, - (i32 (LoReg $Rss)), subreg_loreg)>; - - def: Pat<(or I64:$Rss, IsPow2_64L:$V), - (REG_SEQUENCE DoubleRegs, - (i32 (HiReg $Rss)), subreg_hireg, - (S2_setbit_i (LoReg $Rss), (Log2_64 $V)), subreg_loreg)>; - def: Pat<(or I64:$Rss, IsPow2_64H:$V), - (REG_SEQUENCE DoubleRegs, - (S2_setbit_i (HiReg $Rss), (UDEC32 (i32 (Log2_64 $V)))), - subreg_hireg, - (i32 (LoReg $Rss)), subreg_loreg)>; - - def: Pat<(xor I64:$Rss, IsPow2_64L:$V), - (REG_SEQUENCE DoubleRegs, - (i32 (HiReg $Rss)), subreg_hireg, - (S2_togglebit_i (LoReg $Rss), (Log2_64 $V)), subreg_loreg)>; - def: Pat<(xor I64:$Rss, IsPow2_64H:$V), - (REG_SEQUENCE DoubleRegs, - (S2_togglebit_i (HiReg $Rss), (UDEC32 (i32 (Log2_64 $V)))), - subreg_hireg, - (i32 (LoReg $Rss)), subreg_loreg)>; -} +def: Pat<(i32 (and I32:$Rs, (not (shl 1, u5_0ImmPred:$u5)))), + (S2_clrbit_i IntRegs:$Rs, u5_0ImmPred:$u5)>; +def: Pat<(i32 (or I32:$Rs, (shl 1, u5_0ImmPred:$u5))), + (S2_setbit_i IntRegs:$Rs, u5_0ImmPred:$u5)>; +def: Pat<(i32 (xor I32:$Rs, (shl 1, u5_0ImmPred:$u5))), + (S2_togglebit_i IntRegs:$Rs, u5_0ImmPred:$u5)>; +def: Pat<(i32 (and I32:$Rs, (not (shl 1, I32:$Rt)))), + (S2_clrbit_r IntRegs:$Rs, IntRegs:$Rt)>; +def: Pat<(i32 (or I32:$Rs, (shl 1, I32:$Rt))), + (S2_setbit_r IntRegs:$Rs, IntRegs:$Rt)>; +def: Pat<(i32 (xor I32:$Rs, (shl 1, I32:$Rt))), + (S2_togglebit_r IntRegs:$Rs, IntRegs:$Rt)>; let AddedComplexity = 20 in { // Complexity greater than cmp reg-imm. def: Pat<(i1 (setne (and (shl 1, u5_0ImmPred:$u5), I32:$Rs), 0)), @@ -1724,6 +1642,11 @@ def LogN2_16 : SDNodeXForm<imm, [{ return CurDAG->getTargetConstant(Log2_32(NV), SDLoc(N), MVT::i32); }]>; +def LogN2_32 : SDNodeXForm<imm, [{ + uint32_t NV = ~N->getZExtValue(); + return CurDAG->getTargetConstant(Log2_32(NV), SDLoc(N), MVT::i32); +}]>; + def NegImm8 : SDNodeXForm<imm, [{ int8_t NV = -N->getSExtValue(); return CurDAG->getTargetConstant(NV, SDLoc(N), MVT::i32); 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