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| author | Sanjay Patel <spatel@rotateright.com> | 2016-09-14 16:05:51 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2016-09-14 16:05:51 +0000 |
| commit | b1f0a0f4a88641779e2020b214c64aa9f2d225e9 (patch) | |
| tree | 404cd876bcfbb86e2b7caae5c149e3ca72911886 /llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | |
| parent | 9bd42810064a6eccbb52f176011b43c7a02c65ef (diff) | |
| download | bcm5719-llvm-b1f0a0f4a88641779e2020b214c64aa9f2d225e9.tar.gz bcm5719-llvm-b1f0a0f4a88641779e2020b214c64aa9f2d225e9.zip | |
getValueType().getSizeInBits() -> getValueSizeInBits() ; NFCI
llvm-svn: 281493
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp index ec9a8645c90..75a19eddd47 100644 --- a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp +++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp @@ -2612,7 +2612,7 @@ HexagonTargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const { continue; if (VT.getSizeInBits() == 64 && - Operand.getValueType().getSizeInBits() == 32) { + Operand.getValueSizeInBits() == 32) { SDValue C = DAG.getConstant(0, dl, MVT::i32); Operand = DAG.getNode(HexagonISD::COMBINE, dl, VT, C, Operand); } @@ -2677,7 +2677,7 @@ HexagonTargetLowering::LowerCONCAT_VECTORS(SDValue Op, unsigned N = NElts-i-1; SDValue OpN = Op.getOperand(N); - if (VT.getSizeInBits() == 64 && OpN.getValueType().getSizeInBits() == 32) { + if (VT.getSizeInBits() == 64 && OpN.getValueSizeInBits() == 32) { SDValue C = DAG.getConstant(0, dl, MVT::i32); OpN = DAG.getNode(HexagonISD::COMBINE, dl, VT, C, OpN); } @@ -2857,8 +2857,7 @@ HexagonTargetLowering::LowerINSERT_VECTOR(SDValue Op, DAG.getConstant(32, dl, MVT::i64)); SDValue Combined = DAG.getNode(ISD::OR, dl, MVT::i64, Shifted, Offset); - if (VT.getSizeInBits() == 64 && - Val.getValueType().getSizeInBits() == 32) { + if (VT.getSizeInBits() == 64 && Val.getValueSizeInBits() == 32) { SDValue C = DAG.getConstant(0, dl, MVT::i32); Val = DAG.getNode(HexagonISD::COMBINE, dl, VT, C, Val); } |
