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author | Sjoerd Meijer <sjoerd.meijer@arm.com> | 2016-09-14 08:20:03 +0000 |
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committer | Sjoerd Meijer <sjoerd.meijer@arm.com> | 2016-09-14 08:20:03 +0000 |
commit | 724023a1ec21da0920ad760a1ddfb6ddfdb184d6 (patch) | |
tree | d789865555f9fe05d5152500d78e0ad6b21c1984 /llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp | |
parent | 0569d9d5886d16285f9d6c9ea30de170d3731006 (diff) | |
download | bcm5719-llvm-724023a1ec21da0920ad760a1ddfb6ddfdb184d6.tar.gz bcm5719-llvm-724023a1ec21da0920ad760a1ddfb6ddfdb184d6.zip |
This reapplies r281304. The issue was that I had missed
to copy the new isAdd field in the tablegen data structure.
llvm-svn: 281447
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp')
-rw-r--r-- | llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp b/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp index 930747faa0d..45e61485410 100644 --- a/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp +++ b/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp @@ -411,10 +411,8 @@ bool HexagonHardwareLoops::findInductionRegister(MachineLoop *L, unsigned PhiOpReg = Phi->getOperand(i).getReg(); MachineInstr *DI = MRI->getVRegDef(PhiOpReg); - unsigned UpdOpc = DI->getOpcode(); - bool isAdd = (UpdOpc == Hexagon::A2_addi || UpdOpc == Hexagon::A2_addp); - if (isAdd) { + if (DI->getDesc().isAdd()) { // If the register operand to the add is the PHI we're looking at, this // meets the induction pattern. unsigned IndReg = DI->getOperand(1).getReg(); @@ -1592,10 +1590,8 @@ bool HexagonHardwareLoops::fixupInductionVariable(MachineLoop *L) { unsigned PhiReg = Phi->getOperand(i).getReg(); MachineInstr *DI = MRI->getVRegDef(PhiReg); - unsigned UpdOpc = DI->getOpcode(); - bool isAdd = (UpdOpc == Hexagon::A2_addi || UpdOpc == Hexagon::A2_addp); - if (isAdd) { + if (DI->getDesc().isAdd()) { // If the register operand to the add/sub is the PHI we are looking // at, this meets the induction pattern. unsigned IndReg = DI->getOperand(1).getReg(); |