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author | Scott Michel <scottm@aero.org> | 2009-01-26 03:37:41 +0000 |
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committer | Scott Michel <scottm@aero.org> | 2009-01-26 03:37:41 +0000 |
commit | 95b2a206ee4388f58cfdc28ec768e6c7998c80ed (patch) | |
tree | 9ed64e1b749c3973c9ba79996aec0d5d531f7563 /llvm/lib/Target/CellSPU/SPUInstrInfo.cpp | |
parent | 9e3e4a9219dcb07ecbf0897cbd9d9b39d1cd9630 (diff) | |
download | bcm5719-llvm-95b2a206ee4388f58cfdc28ec768e6c7998c80ed.tar.gz bcm5719-llvm-95b2a206ee4388f58cfdc28ec768e6c7998c80ed.zip |
Untabify code.
llvm-svn: 62991
Diffstat (limited to 'llvm/lib/Target/CellSPU/SPUInstrInfo.cpp')
-rw-r--r-- | llvm/lib/Target/CellSPU/SPUInstrInfo.cpp | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/llvm/lib/Target/CellSPU/SPUInstrInfo.cpp b/llvm/lib/Target/CellSPU/SPUInstrInfo.cpp index f35a42d71a9..46e63893ee2 100644 --- a/llvm/lib/Target/CellSPU/SPUInstrInfo.cpp +++ b/llvm/lib/Target/CellSPU/SPUInstrInfo.cpp @@ -28,8 +28,8 @@ namespace { unsigned opc = I->getOpcode(); return (opc == SPU::BR - || opc == SPU::BRA - || opc == SPU::BI); + || opc == SPU::BRA + || opc == SPU::BI); } //! Predicate for a conditional branch instruction @@ -38,12 +38,12 @@ namespace { return (opc == SPU::BRNZr32 || opc == SPU::BRNZv4i32 - || opc == SPU::BRZr32 - || opc == SPU::BRZv4i32 - || opc == SPU::BRHNZr16 - || opc == SPU::BRHNZv8i16 - || opc == SPU::BRHZr16 - || opc == SPU::BRHZv8i16); + || opc == SPU::BRZr32 + || opc == SPU::BRZv4i32 + || opc == SPU::BRHNZr16 + || opc == SPU::BRHNZv8i16 + || opc == SPU::BRHZr16 + || opc == SPU::BRHZv8i16); } } @@ -531,8 +531,8 @@ SPUInstrInfo::foldMemoryOperandImpl(MachineFunction &MF, */ bool SPUInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, - MachineBasicBlock *&FBB, - SmallVectorImpl<MachineOperand> &Cond) const { + MachineBasicBlock *&FBB, + SmallVectorImpl<MachineOperand> &Cond) const { // If the block has no terminators, it just falls into the block after it. MachineBasicBlock::iterator I = MBB.end(); if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) @@ -621,8 +621,8 @@ SPUInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const { unsigned SPUInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, - MachineBasicBlock *FBB, - const SmallVectorImpl<MachineOperand> &Cond) const { + MachineBasicBlock *FBB, + const SmallVectorImpl<MachineOperand> &Cond) const { // Shouldn't be a fall through. assert(TBB && "InsertBranch must not be told to insert a fallthrough"); assert((Cond.size() == 2 || Cond.size() == 0) && |