bpf: New post-RA peephole optimization pass to eliminate bad RA codegen

This new pass eliminate identical move:

  MOV rA, rA

This is particularly possible to happen when sub-register support
enabled. The special type cast insn MOV_32_64 involves different
register class on src (i32) and dst (i64), RA could generate useless
instruction due to this.

This pass also could serve as the bast for further post-RA optimization.

Signed-off-by: Jiong Wang <jiong.wang@netronome.com>
Signed-off-by: Yonghong Song <yhs@fb.com>
llvm-svn: 327370

1 files changed, 9 insertions, 0 deletions

diff --git a/llvm/lib/Target/BPF/BPFTargetMachine.cpp b/llvm/lib/Target/BPF/BPFTargetMachine.cpp
index 91ff64ba797..84d89bff74f 100644
--- a/llvm/lib/Target/BPF/BPFTargetMachine.cpp
+++ b/llvm/lib/Target/BPF/BPFTargetMachine.cpp
@@ -86,6 +86,7 @@ public:
 
   bool addInstSelector() override;
   void addMachineSSAOptimization() override;
+  void addPreEmitPass() override;
 };
 }
 
@@ -110,3 +111,11 @@ void BPFPassConfig::addMachineSSAOptimization() {
   if (Subtarget->getHasAlu32() && !DisableMIPeephole)
     addPass(createBPFMIPeepholePass());
 }
+
+void BPFPassConfig::addPreEmitPass() {
+  const BPFSubtarget *Subtarget = getBPFTargetMachine().getSubtargetImpl();
+
+  if (getOptLevel() != CodeGenOpt::None)
+    if (Subtarget->getHasAlu32() && !DisableMIPeephole)
+      addPass(createBPFMIPreEmitPeepholePass());
+}