From e91802f33624f8e747f4128d5ad1dae2bb5d0da3 Mon Sep 17 00:00:00 2001 From: Yonghong Song Date: Tue, 13 Mar 2018 06:47:06 +0000 Subject: bpf: New post-RA peephole optimization pass to eliminate bad RA codegen This new pass eliminate identical move: MOV rA, rA This is particularly possible to happen when sub-register support enabled. The special type cast insn MOV_32_64 involves different register class on src (i32) and dst (i64), RA could generate useless instruction due to this. This pass also could serve as the bast for further post-RA optimization. Signed-off-by: Jiong Wang Signed-off-by: Yonghong Song llvm-svn: 327370 --- llvm/lib/Target/BPF/BPFTargetMachine.cpp | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'llvm/lib/Target/BPF/BPFTargetMachine.cpp') diff --git a/llvm/lib/Target/BPF/BPFTargetMachine.cpp b/llvm/lib/Target/BPF/BPFTargetMachine.cpp index 91ff64ba797..84d89bff74f 100644 --- a/llvm/lib/Target/BPF/BPFTargetMachine.cpp +++ b/llvm/lib/Target/BPF/BPFTargetMachine.cpp @@ -86,6 +86,7 @@ public: bool addInstSelector() override; void addMachineSSAOptimization() override; + void addPreEmitPass() override; }; } @@ -110,3 +111,11 @@ void BPFPassConfig::addMachineSSAOptimization() { if (Subtarget->getHasAlu32() && !DisableMIPeephole) addPass(createBPFMIPeepholePass()); } + +void BPFPassConfig::addPreEmitPass() { + const BPFSubtarget *Subtarget = getBPFTargetMachine().getSubtargetImpl(); + + if (getOptLevel() != CodeGenOpt::None) + if (Subtarget->getHasAlu32() && !DisableMIPeephole) + addPass(createBPFMIPreEmitPeepholePass()); +} -- cgit v1.2.3