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authorAndrew Lenharth <andrewl@lenharth.org>2005-10-06 16:53:32 +0000
committerAndrew Lenharth <andrewl@lenharth.org>2005-10-06 16:53:32 +0000
commit332df13b9e32097407216212c6544ba84a874407 (patch)
tree81b7f63801133e88b3b4200e1ee32ba23bb54c89 /llvm/lib/Target/Alpha
parent4bbbb9eed7a9b241f1365380011bf106ae383438 (diff)
downloadbcm5719-llvm-332df13b9e32097407216212c6544ba84a874407.tar.gz
bcm5719-llvm-332df13b9e32097407216212c6544ba84a874407.zip
remove VAX compatibility instruction, we will never use this
llvm-svn: 23643
Diffstat (limited to 'llvm/lib/Target/Alpha')
-rw-r--r--llvm/lib/Target/Alpha/AlphaInstrInfo.td2
1 files changed, 0 insertions, 2 deletions
diff --git a/llvm/lib/Target/Alpha/AlphaInstrInfo.td b/llvm/lib/Target/Alpha/AlphaInstrInfo.td
index ea0776b9b9d..f355a12f235 100644
--- a/llvm/lib/Target/Alpha/AlphaInstrInfo.td
+++ b/llvm/lib/Target/Alpha/AlphaInstrInfo.td
@@ -397,9 +397,7 @@ def CVTTS : FPForm<0x16, 0x5AC, "cvtts/su $RB,$RC">; //Convert T_floating to S_f
//LDQ_L Mem 2B Load quadword locked
//LDQ_U Mem 0B Load unaligned quadword
//MB Mfc 18.4000 Memory barrier
-//RC Mfc 18.E000 Read and clear
//RPCC Mfc 18.C000 Read process cycle counter
-//RS Mfc 18.F000 Read and set
//STL_C Mem 2E Store longword conditional
//STQ_C Mem 2F Store quadword conditional
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