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| author | Andrew Lenharth <andrewl@lenharth.org> | 2005-11-12 19:06:28 +0000 |
|---|---|---|
| committer | Andrew Lenharth <andrewl@lenharth.org> | 2005-11-12 19:06:28 +0000 |
| commit | 2ba45d1ee972ce9cc6d76879a64e5b80cc129faa (patch) | |
| tree | fbb36180cef1c7c032e6ae16ad091c5b58e55430 /llvm/lib/Target/Alpha | |
| parent | 56526ec1a900cda73b9c0c0e715ab441690df2ac (diff) | |
| download | bcm5719-llvm-2ba45d1ee972ce9cc6d76879a64e5b80cc129faa.tar.gz bcm5719-llvm-2ba45d1ee972ce9cc6d76879a64e5b80cc129faa.zip | |
fix more regressions
llvm-svn: 24335
Diffstat (limited to 'llvm/lib/Target/Alpha')
| -rw-r--r-- | llvm/lib/Target/Alpha/AlphaISelPattern.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/Alpha/AlphaISelPattern.cpp b/llvm/lib/Target/Alpha/AlphaISelPattern.cpp index 0074fd448ea..1e6bab6c3a9 100644 --- a/llvm/lib/Target/Alpha/AlphaISelPattern.cpp +++ b/llvm/lib/Target/Alpha/AlphaISelPattern.cpp @@ -369,7 +369,7 @@ bool AlphaISel::SelectFPSetCC(SDOperand N, unsigned dst) //assert(0 && "Setcc On float?\n"); std::cerr << "Setcc on float!\n"; Tmp3 = MakeReg(MVT::f64); - BuildMI(BB, Alpha::CVTST, 1, Tmp3).addReg(Alpha::F31).addReg(Tmp1); + BuildMI(BB, Alpha::CVTST, 1, Tmp3).addReg(Tmp1); Tmp1 = Tmp3; } if (SetCC->getOperand(1).getValueType() == MVT::f32) @@ -377,7 +377,7 @@ bool AlphaISel::SelectFPSetCC(SDOperand N, unsigned dst) //assert (0 && "Setcc On float?\n"); std::cerr << "Setcc on float!\n"; Tmp3 = MakeReg(MVT::f64); - BuildMI(BB, Alpha::CVTST, 1, Tmp3).addReg(Alpha::F31).addReg(Tmp2); + BuildMI(BB, Alpha::CVTST, 1, Tmp3).addReg(Tmp2); Tmp2 = Tmp3; } |
