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authorOwen Anderson <resistor@mac.com>2011-09-19 22:34:23 +0000
committerOwen Anderson <resistor@mac.com>2011-09-19 22:34:23 +0000
commitf902d92fc91496fc821285d828db0ee45f05edef (patch)
treecd0baf4590238c4ed78cd95b166bd3d7c78891f4 /llvm/lib/Target/ARM
parent05541f45f3e374d481f7c1e6e9cee638c663b704 (diff)
downloadbcm5719-llvm-f902d92fc91496fc821285d828db0ee45f05edef.tar.gz
bcm5719-llvm-f902d92fc91496fc821285d828db0ee45f05edef.zip
Thumb2 TBB and TBH instructions are only allowed at the end of IT blocks, not in the middle.
llvm-svn: 140079
Diffstat (limited to 'llvm/lib/Target/ARM')
-rw-r--r--llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index dea38bf00a3..5fd641db2de 100644
--- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -454,6 +454,8 @@ ThumbDisassembler::AddThumbPredicate(MCInst &MI) const {
break;
case ARM::tB:
case ARM::t2B:
+ case ARM::t2TBB:
+ case ARM::t2TBH:
// Some instructions (mostly unconditional branches) can
// only appears at the end of, or outside of, an IT.
if (ITBlock.size() > 1)
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