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authorManman Ren <manman.ren@gmail.com>2016-03-29 17:37:21 +0000
committerManman Ren <manman.ren@gmail.com>2016-03-29 17:37:21 +0000
commitf46262e0b7a183c22b9384cd729c5fb0f05e5d38 (patch)
treea4c3cb4390adf67c3341875e7734d38230204150 /llvm/lib/Target/ARM
parent6e5c1fed08edf57725b9dc2e5c7ab429d25569a6 (diff)
downloadbcm5719-llvm-f46262e0b7a183c22b9384cd729c5fb0f05e5d38.tar.gz
bcm5719-llvm-f46262e0b7a183c22b9384cd729c5fb0f05e5d38.zip
Swift Calling Convention: add swiftself attribute.
Differential Revision: http://reviews.llvm.org/D17866 llvm-svn: 264754
Diffstat (limited to 'llvm/lib/Target/ARM')
-rw-r--r--llvm/lib/Target/ARM/ARMCallingConv.td9
-rw-r--r--llvm/lib/Target/ARM/ARMFastISel.cpp2
2 files changed, 11 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMCallingConv.td b/llvm/lib/Target/ARM/ARMCallingConv.td
index 0ca9007cf13..d46a96a41ca 100644
--- a/llvm/lib/Target/ARM/ARMCallingConv.td
+++ b/llvm/lib/Target/ARM/ARMCallingConv.td
@@ -23,6 +23,9 @@ def CC_ARM_APCS : CallingConv<[
CCIfType<[i1, i8, i16], CCPromoteToType<i32>>,
+ // A SwiftSelf is passed in R9.
+ CCIfSwiftSelf<CCIfType<[i32], CCAssignToReg<[R9]>>>,
+
// Handle all vector types as either f64 or v2f64.
CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
@@ -151,6 +154,9 @@ def CC_ARM_AAPCS : CallingConv<[
CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
+ // A SwiftSelf is passed in R9.
+ CCIfSwiftSelf<CCIfType<[i32], CCAssignToReg<[R9]>>>,
+
CCIfType<[f64, v2f64], CCCustom<"CC_ARM_AAPCS_Custom_f64">>,
CCIfType<[f32], CCBitConvertToType<i32>>,
CCDelegateTo<CC_ARM_AAPCS_Common>
@@ -179,6 +185,9 @@ def CC_ARM_AAPCS_VFP : CallingConv<[
CCIfType<[v1i64, v2i32, v4i16, v8i8, v2f32], CCBitConvertToType<f64>>,
CCIfType<[v2i64, v4i32, v8i16, v16i8, v4f32], CCBitConvertToType<v2f64>>,
+ // A SwiftSelf is passed in R9.
+ CCIfSwiftSelf<CCIfType<[i32], CCAssignToReg<[R9]>>>,
+
// HFAs are passed in a contiguous block of registers, or on the stack
CCIfConsecutiveRegs<CCCustom<"CC_ARM_AAPCS_Custom_Aggregate">>,
diff --git a/llvm/lib/Target/ARM/ARMFastISel.cpp b/llvm/lib/Target/ARM/ARMFastISel.cpp
index 361552568b6..6e41053ec5a 100644
--- a/llvm/lib/Target/ARM/ARMFastISel.cpp
+++ b/llvm/lib/Target/ARM/ARMFastISel.cpp
@@ -2345,6 +2345,7 @@ bool ARMFastISel::SelectCall(const Instruction *I,
// FIXME: Only handle *easy* calls for now.
if (CS.paramHasAttr(AttrInd, Attribute::InReg) ||
CS.paramHasAttr(AttrInd, Attribute::StructRet) ||
+ CS.paramHasAttr(AttrInd, Attribute::SwiftSelf) ||
CS.paramHasAttr(AttrInd, Attribute::Nest) ||
CS.paramHasAttr(AttrInd, Attribute::ByVal))
return false;
@@ -3019,6 +3020,7 @@ bool ARMFastISel::fastLowerArguments() {
if (F->getAttributes().hasAttribute(Idx, Attribute::InReg) ||
F->getAttributes().hasAttribute(Idx, Attribute::StructRet) ||
+ F->getAttributes().hasAttribute(Idx, Attribute::SwiftSelf) ||
F->getAttributes().hasAttribute(Idx, Attribute::ByVal))
return false;
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