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| author | Evan Cheng <evan.cheng@apple.com> | 2011-07-20 07:51:56 +0000 | 
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2011-07-20 07:51:56 +0000 | 
| commit | efd9b4240f78a632b7e46697a94db6c74d2487b9 (patch) | |
| tree | 32a97747ae79f5b6d584f499cbdc4e35c13b41ec /llvm/lib/Target/ARM | |
| parent | d2b92d6544c06d8a7af6939a587b781ca1d37342 (diff) | |
| download | bcm5719-llvm-efd9b4240f78a632b7e46697a94db6c74d2487b9.tar.gz bcm5719-llvm-efd9b4240f78a632b7e46697a94db6c74d2487b9.zip  | |
- Move CodeModel from a TargetMachine global option to MCCodeGenInfo.
- Introduce JITDefault code model. This tells targets to set different default
  code model for JIT. This eliminates the ugly hack in TargetMachine where
  code model is changed after construction.
llvm-svn: 135580
Diffstat (limited to 'llvm/lib/Target/ARM')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMTargetMachine.cpp | 12 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMTargetMachine.h | 9 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp | 5 | 
3 files changed, 15 insertions, 11 deletions
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp index 92f2f5bf40f..3758b0ddf0f 100644 --- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp +++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp @@ -64,8 +64,8 @@ extern "C" void LLVMInitializeARMTarget() {  ///  ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T, StringRef TT,                                             StringRef CPU, StringRef FS, -                                           Reloc::Model RM) -  : LLVMTargetMachine(T, TT, CPU, FS, RM), +                                           Reloc::Model RM, CodeModel::Model CM) +  : LLVMTargetMachine(T, TT, CPU, FS, RM, CM),      Subtarget(TT, CPU, FS),      JITInfo(),      InstrItins(Subtarget.getInstrItineraryData()) { @@ -76,8 +76,8 @@ ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T, StringRef TT,  ARMTargetMachine::ARMTargetMachine(const Target &T, StringRef TT,                                     StringRef CPU, StringRef FS, -                                   Reloc::Model RM) -  : ARMBaseTargetMachine(T, TT, CPU, FS, RM), InstrInfo(Subtarget), +                                   Reloc::Model RM, CodeModel::Model CM) +  : ARMBaseTargetMachine(T, TT, CPU, FS, RM, CM), InstrInfo(Subtarget),      DataLayout(Subtarget.isAPCS_ABI() ?                 std::string("e-p:32:32-f64:32:64-i64:32:64-"                             "v128:32:128-v64:32:64-n32") : @@ -94,8 +94,8 @@ ARMTargetMachine::ARMTargetMachine(const Target &T, StringRef TT,  ThumbTargetMachine::ThumbTargetMachine(const Target &T, StringRef TT,                                         StringRef CPU, StringRef FS, -                                       Reloc::Model RM) -  : ARMBaseTargetMachine(T, TT, CPU, FS, RM), +                                       Reloc::Model RM, CodeModel::Model CM) +  : ARMBaseTargetMachine(T, TT, CPU, FS, RM, CM),      InstrInfo(Subtarget.hasThumb2()                ? ((ARMBaseInstrInfo*)new Thumb2InstrInfo(Subtarget))                : ((ARMBaseInstrInfo*)new Thumb1InstrInfo(Subtarget))), diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.h b/llvm/lib/Target/ARM/ARMTargetMachine.h index 616ea9c3d22..c8c601c3017 100644 --- a/llvm/lib/Target/ARM/ARMTargetMachine.h +++ b/llvm/lib/Target/ARM/ARMTargetMachine.h @@ -40,7 +40,8 @@ private:  public:    ARMBaseTargetMachine(const Target &T, StringRef TT, -                       StringRef CPU, StringRef FS, Reloc::Model RM); +                       StringRef CPU, StringRef FS, +                       Reloc::Model RM, CodeModel::Model CM);    virtual       ARMJITInfo       *getJITInfo()         { return &JITInfo; }    virtual const ARMSubtarget  *getSubtargetImpl() const { return &Subtarget; } @@ -69,7 +70,8 @@ class ARMTargetMachine : public ARMBaseTargetMachine {    ARMFrameLowering    FrameLowering;   public:    ARMTargetMachine(const Target &T, StringRef TT, -                   StringRef CPU, StringRef FS, Reloc::Model RM); +                   StringRef CPU, StringRef FS, +                   Reloc::Model RM, CodeModel::Model CM);    virtual const ARMRegisterInfo  *getRegisterInfo() const {      return &InstrInfo.getRegisterInfo(); @@ -108,7 +110,8 @@ class ThumbTargetMachine : public ARMBaseTargetMachine {    OwningPtr<ARMFrameLowering> FrameLowering;  public:    ThumbTargetMachine(const Target &T, StringRef TT, -                     StringRef CPU, StringRef FS, Reloc::Model RM); +                     StringRef CPU, StringRef FS, +                     Reloc::Model RM, CodeModel::Model CM);    /// returns either Thumb1RegisterInfo or Thumb2RegisterInfo    virtual const ARMBaseRegisterInfo *getRegisterInfo() const { diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp index 09bcf0231ed..e64902ccfda 100644 --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp @@ -143,11 +143,12 @@ extern "C" void LLVMInitializeARMMCAsmInfo() {    RegisterMCAsmInfoFn B(TheThumbTarget, createARMMCAsmInfo);  } -MCCodeGenInfo *createARMMCCodeGenInfo(StringRef TT, Reloc::Model RM) { +MCCodeGenInfo *createARMMCCodeGenInfo(StringRef TT, Reloc::Model RM, +                                      CodeModel::Model CM) {    MCCodeGenInfo *X = new MCCodeGenInfo();    if (RM == Reloc::Default)      RM = Reloc::DynamicNoPIC; -  X->InitMCCodeGenInfo(RM); +  X->InitMCCodeGenInfo(RM, CM);    return X;  }  | 

