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| author | Arnold Schwaighofer <aschwaighofer@apple.com> | 2013-02-19 20:16:45 +0000 |
|---|---|---|
| committer | Arnold Schwaighofer <aschwaighofer@apple.com> | 2013-02-19 20:16:45 +0000 |
| commit | e4df5eb34a47207941f53787c48dff20f1b4ff65 (patch) | |
| tree | b88a47e36f9dda6e84e86470bc75cba9154e705c /llvm/lib/Target/ARM | |
| parent | 6db1b7ca16729d0f73066dcdf4dc7c2a89ea37f7 (diff) | |
| download | bcm5719-llvm-e4df5eb34a47207941f53787c48dff20f1b4ff65.tar.gz bcm5719-llvm-e4df5eb34a47207941f53787c48dff20f1b4ff65.zip | |
ARM NEON: Don't need COPY_TO_REGCLASS in pattern
In my previous commit:
"Merge a f32 bitcast of a v2i32 extractelt
A vectorized sitfp on doubles will get scalarized to a sequence of an
extract_element of <2 x i32>, a bitcast to f32 and a sitofp.
Due to the the extract_element, and the bitcast we will uneccessarily generate
moves between scalar and vector registers."
I added a pattern containing a copy_to_regclass. The copy_to_regclass is
actually not needed.
radar://13191881
llvm-svn: 175555
Diffstat (limited to 'llvm/lib/Target/ARM')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrNEON.td | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrNEON.td b/llvm/lib/Target/ARM/ARMInstrNEON.td index 9f68c220777..0411ac4e282 100644 --- a/llvm/lib/Target/ARM/ARMInstrNEON.td +++ b/llvm/lib/Target/ARM/ARMInstrNEON.td @@ -5747,9 +5747,7 @@ def : Pat<(v2f64 (bitconvert (v4f32 QPR:$src))), (v2f64 QPR:$src)>; // Fold extracting an element out of a v2i32 into a vfp register. def : Pat<(f32 (bitconvert (i32 (extractelt (v2i32 DPR:$src), imm:$lane)))), - (f32 (EXTRACT_SUBREG - (v2f32 (COPY_TO_REGCLASS (v2i32 DPR:$src), DPR)), - (SSubReg_f32_reg imm:$lane)))>; + (f32 (EXTRACT_SUBREG DPR:$src, (SSubReg_f32_reg imm:$lane)))>; // Vector lengthening move with load, matching extending loads. |
