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| author | Devang Patel <dpatel@apple.com> | 2011-04-27 20:29:27 +0000 |
|---|---|---|
| committer | Devang Patel <dpatel@apple.com> | 2011-04-27 20:29:27 +0000 |
| commit | e3745fdcf3663f19a0e08deb4a763baa77271a88 (patch) | |
| tree | 3d31711804f1fe99519c7ef589ac53f5eb1ff94b /llvm/lib/Target/ARM | |
| parent | f6c61a34bf324702444aa3cdfabfd67a39e43fb9 (diff) | |
| download | bcm5719-llvm-e3745fdcf3663f19a0e08deb4a763baa77271a88.tar.gz bcm5719-llvm-e3745fdcf3663f19a0e08deb4a763baa77271a88.zip | |
Revert r130178. It turned out to be not the optimal path to emit complex location expressions.
llvm-svn: 130326
Diffstat (limited to 'llvm/lib/Target/ARM')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMAsmPrinter.cpp | 10 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMAsmPrinter.h | 3 |
2 files changed, 5 insertions, 8 deletions
diff --git a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp index 10cccda5e8b..b8c117c2cbe 100644 --- a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp +++ b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp @@ -173,11 +173,10 @@ getDebugValueLocation(const MachineInstr *MI) const { } /// EmitDwarfRegOp - Emit dwarf register operation. -void ARMAsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc, - unsigned ExtraExprSize) const { +void ARMAsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc) const { const TargetRegisterInfo *RI = TM.getRegisterInfo(); if (RI->getDwarfRegNum(MLoc.getReg(), false) != -1) - AsmPrinter::EmitDwarfRegOp(MLoc, ExtraExprSize); + AsmPrinter::EmitDwarfRegOp(MLoc); else { unsigned Reg = MLoc.getReg(); if (Reg >= ARM::S0 && Reg <= ARM::S31) { @@ -192,7 +191,7 @@ void ARMAsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc, OutStreamer.AddComment("Loc expr size"); // DW_OP_regx + ULEB + DW_OP_bit_piece + ULEB + ULEB // 1 + ULEB(Rx) + 1 + 1 + 1 - EmitInt16(4 + MCAsmInfo::getULEB128Size(Rx) + ExtraExprSize); + EmitInt16(4 + MCAsmInfo::getULEB128Size(Rx)); OutStreamer.AddComment("DW_OP_regx for S register"); EmitInt8(dwarf::DW_OP_regx); @@ -224,8 +223,7 @@ void ARMAsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc, // DW_OP_regx + ULEB + DW_OP_piece + ULEB(8) + // DW_OP_regx + ULEB + DW_OP_piece + ULEB(8); // 6 + ULEB(D1) + ULEB(D2) - EmitInt16(6 + MCAsmInfo::getULEB128Size(D1) - + MCAsmInfo::getULEB128Size(D2) + ExtraExprSize); + EmitInt16(6 + MCAsmInfo::getULEB128Size(D1) + MCAsmInfo::getULEB128Size(D2)); OutStreamer.AddComment("DW_OP_regx for Q register: D1"); EmitInt8(dwarf::DW_OP_regx); diff --git a/llvm/lib/Target/ARM/ARMAsmPrinter.h b/llvm/lib/Target/ARM/ARMAsmPrinter.h index e94901449a1..5f9169ef7f7 100644 --- a/llvm/lib/Target/ARM/ARMAsmPrinter.h +++ b/llvm/lib/Target/ARM/ARMAsmPrinter.h @@ -90,8 +90,7 @@ public: MachineLocation getDebugValueLocation(const MachineInstr *MI) const; /// EmitDwarfRegOp - Emit dwarf register operation. - virtual void EmitDwarfRegOp(const MachineLocation &MLoc, - unsigned ExtraExprSize = 0) const; + virtual void EmitDwarfRegOp(const MachineLocation &MLoc) const; virtual unsigned getISAEncoding() { // ARM/Darwin adds ISA to the DWARF info for each function. |
