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| author | Sam Parker <sam.parker@arm.com> | 2019-11-19 08:41:37 +0000 |
|---|---|---|
| committer | Sam Parker <sam.parker@arm.com> | 2019-11-19 08:51:12 +0000 |
| commit | d43913ae3818c86e640f406761ec7202a8ebb24e (patch) | |
| tree | 222fe798df2fa798baaf027af35288227b5bbe18 /llvm/lib/Target/ARM | |
| parent | 8b5f6c16476c7a8f50b660fb6e1b549759a783b6 (diff) | |
| download | bcm5719-llvm-d43913ae3818c86e640f406761ec7202a8ebb24e.tar.gz bcm5719-llvm-d43913ae3818c86e640f406761ec7202a8ebb24e.zip | |
[ARM][MVE] Enable narrow vectors for tail pred
Remove the restriction, from the mve tail predication pass, that the
all masked vectors instructions need to be 128-bits. This allows us
to supported extending loads and truncating stores.
Differential Revision: https://reviews.llvm.org/D69946
Diffstat (limited to 'llvm/lib/Target/ARM')
| -rw-r--r-- | llvm/lib/Target/ARM/MVETailPredication.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/MVETailPredication.cpp b/llvm/lib/Target/ARM/MVETailPredication.cpp index 36dcde250e3..397f9004477 100644 --- a/llvm/lib/Target/ARM/MVETailPredication.cpp +++ b/llvm/lib/Target/ARM/MVETailPredication.cpp @@ -299,7 +299,7 @@ bool MVETailPredication::IsPredicatedVectorLoop() { // MVE vectors are 128-bit, but don't support 128 x i1. // TODO: Can we support vectors larger than 128-bits? unsigned MaxWidth = TTI->getRegisterBitWidth(true); - if (Lanes * ElementWidth != MaxWidth || Lanes == MaxWidth) + if (Lanes * ElementWidth > MaxWidth || Lanes == MaxWidth) return false; MaskedInsts.push_back(cast<IntrinsicInst>(&I)); } else if (auto *Int = dyn_cast<IntrinsicInst>(&I)) { |
