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| author | David Green <david.green@arm.com> | 2018-04-27 11:29:49 +0000 |
|---|---|---|
| committer | David Green <david.green@arm.com> | 2018-04-27 11:29:49 +0000 |
| commit | c4cccea4c92e19c68c525c8e3fdee4f555be4de3 (patch) | |
| tree | 89c4c9d6945251afde0189ca46690b52c82b23d2 /llvm/lib/Target/ARM | |
| parent | 4700faa28ec2653fac95865bc493483b7a1c70ad (diff) | |
| download | bcm5719-llvm-c4cccea4c92e19c68c525c8e3fdee4f555be4de3.tar.gz bcm5719-llvm-c4cccea4c92e19c68c525c8e3fdee4f555be4de3.zip | |
[ARM] Enable misched for R52.
Back when the R52 schedule was added in rL286949, there was no way
to enable machine schedules in ARM for specific cores. Since then a
target feature has been added. This enables the feature for R52,
removing the need to manually specify compiler flags.
llvm-svn: 331027
Diffstat (limited to 'llvm/lib/Target/ARM')
| -rw-r--r-- | llvm/lib/Target/ARM/ARM.td | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td index ecb2ef2351d..477f45fe24b 100644 --- a/llvm/lib/Target/ARM/ARM.td +++ b/llvm/lib/Target/ARM/ARM.td @@ -999,6 +999,7 @@ def : ProcNoItin<"kryo", [ARMv8a, ProcKryo, FeatureCRC]>; def : ProcessorModel<"cortex-r52", CortexR52Model, [ARMv8r, ProcR52, + FeatureUseMISched, FeatureFPAO]>; //===----------------------------------------------------------------------===// |
