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authorJohnny Chen <johnny.chen@apple.com>2011-04-13 21:35:49 +0000
committerJohnny Chen <johnny.chen@apple.com>2011-04-13 21:35:49 +0000
commitb6a37bff21fa9c4adf3476339df28b17cf8e0c6f (patch)
tree00e877fc23613795157476bb5a3aeb97873ef993 /llvm/lib/Target/ARM
parent5d3e8229265459a664e176edde2c76a8bc6fdfc1 (diff)
downloadbcm5719-llvm-b6a37bff21fa9c4adf3476339df28b17cf8e0c6f.tar.gz
bcm5719-llvm-b6a37bff21fa9c4adf3476339df28b17cf8e0c6f.zip
Check for unallocated instruction encodings when disassembling Thumb Branch instructions (tBcc and t2Bcc).
rdar://problem/9280470 llvm-svn: 129471
Diffstat (limited to 'llvm/lib/Target/ARM')
-rw-r--r--llvm/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp16
1 files changed, 11 insertions, 5 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
index dc04227420b..4ecb8be012d 100644
--- a/llvm/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
+++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
@@ -3625,11 +3625,17 @@ bool ARMBasicMCBuilder::TryPredicateAndSBitModifier(MCInst& MI, unsigned Opcode,
// like ARM.
//
// A8.6.16 B
- if (Name == "t2Bcc")
- MI.addOperand(MCOperand::CreateImm(CondCode(slice(insn, 25, 22))));
- else if (Name == "tBcc")
- MI.addOperand(MCOperand::CreateImm(CondCode(slice(insn, 11, 8))));
- else
+ // Check for undefined encodings.
+ unsigned cond;
+ if (Name == "t2Bcc") {
+ if ((cond = slice(insn, 25, 22)) >= 14)
+ return false;
+ MI.addOperand(MCOperand::CreateImm(CondCode(cond)));
+ } else if (Name == "tBcc") {
+ if ((cond = slice(insn, 11, 8)) == 14)
+ return false;
+ MI.addOperand(MCOperand::CreateImm(CondCode(cond)));
+ } else
MI.addOperand(MCOperand::CreateImm(ARMCC::AL));
} else {
// ARM instructions get their condition field from Inst{31-28}.
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