summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/ARM
diff options
context:
space:
mode:
authorCameron Zwarich <zwarich@apple.com>2011-04-15 21:24:38 +0000
committerCameron Zwarich <zwarich@apple.com>2011-04-15 21:24:38 +0000
commit9c65e4d69cdc3f503119053c59bf0a5ca01e702e (patch)
tree72c97dfb933a4f5819ae86b3387c77c494ec8506 /llvm/lib/Target/ARM
parentb92fbb7036078e60377f82d837651b2f50fae65f (diff)
downloadbcm5719-llvm-9c65e4d69cdc3f503119053c59bf0a5ca01e702e.tar.gz
bcm5719-llvm-9c65e4d69cdc3f503119053c59bf0a5ca01e702e.zip
Add ORR and EOR to the CMP peephole optimizer. It's hard to get isel to generate
a case involving EOR, so I only added a test for ORR. llvm-svn: 129610
Diffstat (limited to 'llvm/lib/Target/ARM')
-rw-r--r--llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp10
1 files changed, 9 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
index 465d6122aae..0789279133f 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -1642,7 +1642,15 @@ OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, int CmpMask,
case ARM::ANDrr:
case ARM::ANDri:
case ARM::t2ANDrr:
- case ARM::t2ANDri: {
+ case ARM::t2ANDri:
+ case ARM::ORRrr:
+ case ARM::ORRri:
+ case ARM::t2ORRrr:
+ case ARM::t2ORRri:
+ case ARM::EORrr:
+ case ARM::EORri:
+ case ARM::t2EORrr:
+ case ARM::t2EORri: {
// Scan forward for the use of CPSR, if it's a conditional code requires
// checking of V bit, then this is not safe to do. If we can't find the
// CPSR use (i.e. used in another block), then it's not safe to perform
OpenPOWER on IntegriCloud