Change TargetAsmInfo to be constructed via TargetRegistry from a Target+Triple

pair instead of from a virtual method on TargetMachine.  This cuts the final
ties of TargetAsmInfo to TargetMachine, meaning that MC can now use 
TargetAsmInfo.

llvm-svn: 78802

2 files changed, 16 insertions, 12 deletions

diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
index c66570b2e3c..fbc5f38efea 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
@@ -27,10 +27,26 @@ static cl::opt<bool> DisableLdStOpti("disable-arm-loadstore-opti", cl::Hidden,
 static cl::opt<bool> DisableIfConversion("disable-arm-if-conversion",cl::Hidden,
                               cl::desc("Disable if-conversion pass"));
 
+static const TargetAsmInfo *createTargetAsmInfo(const Target &T,
+                                                const StringRef &TT) {
+  Triple TheTriple(TT);
+  switch (TheTriple.getOS()) {
+  case Triple::Darwin:
+    return new ARMDarwinTargetAsmInfo();
+  default:
+    return new ARMELFTargetAsmInfo();
+  }
+}
+
+
 extern "C" void LLVMInitializeARMTarget() {
   // Register the target.
   RegisterTargetMachine<ARMTargetMachine> X(TheARMTarget);
   RegisterTargetMachine<ThumbTargetMachine> Y(TheThumbTarget);
+  
+  // Register the target asm info.
+  RegisterAsmInfoFn A(TheARMTarget, createTargetAsmInfo);
+  RegisterAsmInfoFn B(TheThumbTarget, createTargetAsmInfo);
 }
 
 /// TargetMachine ctor - Create an ARM architecture model.
@@ -73,16 +89,6 @@ ThumbTargetMachine::ThumbTargetMachine(const Target &T, const std::string &TT,
 }
 
 
-const TargetAsmInfo *ARMBaseTargetMachine::createTargetAsmInfo() const {
-  switch (Subtarget.TargetType) {
-  default: llvm_unreachable("Unknown ARM subtarget kind");
-  case ARMSubtarget::isDarwin:
-    return new ARMDarwinTargetAsmInfo();
-  case ARMSubtarget::isELF:
-    return new ARMELFTargetAsmInfo();
-  }
-}
-
 
 // Pass Pipeline Configuration
 bool ARMBaseTargetMachine::addInstSelector(PassManagerBase &PM,
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.h b/llvm/lib/Target/ARM/ARMTargetMachine.h
index d992f08f2f0..420305500f4 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.h
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.h
@@ -47,8 +47,6 @@ public:
     return InstrItins;
   }
 
-  virtual const TargetAsmInfo *createTargetAsmInfo() const;
-
   // Pass Pipeline Configuration
   virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
   virtual bool addPreRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel);