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authorJames Molloy <james.molloy@arm.com>2014-05-16 14:11:38 +0000
committerJames Molloy <james.molloy@arm.com>2014-05-16 14:11:38 +0000
commit92a15078f141463fee01dabc9b1236bfcebc041e (patch)
tree0c03da440392c0a8e9911dc1d862c2004817a3ad /llvm/lib/Target/ARM
parentbb73c23ffab38b73aa3ac2c9f003db73712511d1 (diff)
downloadbcm5719-llvm-92a15078f141463fee01dabc9b1236bfcebc041e.tar.gz
bcm5719-llvm-92a15078f141463fee01dabc9b1236bfcebc041e.zip
Enable the Load/Store optimization pass for Thumb1 but make it return immediately for now.
Patch by Moritz Roth! llvm-svn: 208991
Diffstat (limited to 'llvm/lib/Target/ARM')
-rw-r--r--llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp11
-rw-r--r--llvm/lib/Target/ARM/ARMTargetMachine.cpp11
2 files changed, 14 insertions, 8 deletions
diff --git a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
index e642aa61d57..5b678bd2799 100644
--- a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
+++ b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
@@ -68,7 +68,7 @@ namespace {
const ARMSubtarget *STI;
ARMFunctionInfo *AFI;
RegScavenger *RS;
- bool isThumb2;
+ bool isThumb1, isThumb2;
bool runOnMachineFunction(MachineFunction &Fn) override;
@@ -1520,6 +1520,10 @@ bool ARMLoadStoreOpt::runOnMachineFunction(MachineFunction &Fn) {
STI = &TM.getSubtarget<ARMSubtarget>();
RS = new RegScavenger();
isThumb2 = AFI->isThumb2Function();
+ isThumb1 = AFI->isThumbFunction() && !isThumb2;
+
+ // Don't do anything in this pass with Thumb1 for now.
+ if (isThumb1) return false;
bool Modified = false;
for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
@@ -1581,6 +1585,11 @@ bool ARMPreAllocLoadStoreOpt::runOnMachineFunction(MachineFunction &Fn) {
MRI = &Fn.getRegInfo();
MF = &Fn;
+ ARMFunctionInfo *AFI = Fn.getInfo<ARMFunctionInfo>();
+ bool isThumb1 = AFI->isThumbFunction() && !AFI->isThumb2Function();
+ // Don't do anything in this pass with Thumb1 for now.
+ if (isThumb1) return false;
+
bool Modified = false;
for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
++MFI)
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
index 91e22dc16fc..887622705ed 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
@@ -247,8 +247,7 @@ bool ARMPassConfig::addInstSelector() {
}
bool ARMPassConfig::addPreRegAlloc() {
- // FIXME: temporarily disabling load / store optimization pass for Thumb1.
- if (getOptLevel() != CodeGenOpt::None && !getARMSubtarget().isThumb1Only())
+ if (getOptLevel() != CodeGenOpt::None)
addPass(createARMLoadStoreOptimizationPass(true));
if (getOptLevel() != CodeGenOpt::None && getARMSubtarget().isCortexA9())
addPass(createMLxExpansionPass());
@@ -262,12 +261,10 @@ bool ARMPassConfig::addPreRegAlloc() {
}
bool ARMPassConfig::addPreSched2() {
- // FIXME: temporarily disabling load / store optimization pass for Thumb1.
if (getOptLevel() != CodeGenOpt::None) {
- if (!getARMSubtarget().isThumb1Only()) {
- addPass(createARMLoadStoreOptimizationPass());
- printAndVerify("After ARM load / store optimizer");
- }
+ addPass(createARMLoadStoreOptimizationPass());
+ printAndVerify("After ARM load / store optimizer");
+
if (getARMSubtarget().hasNEON())
addPass(createExecutionDependencyFixPass(&ARM::DPRRegClass));
}
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