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| author | David Green <david.green@arm.com> | 2019-10-10 16:34:30 +0000 |
|---|---|---|
| committer | David Green <david.green@arm.com> | 2019-10-10 16:34:30 +0000 |
| commit | 8628bb0491cfbef98c866110d09a5c81caed6095 (patch) | |
| tree | 16e2359863ef09575f23c62ffc02237ddf463c67 /llvm/lib/Target/ARM | |
| parent | a8419b1f2767c7fd5c0d0696b76d17efb2a5b418 (diff) | |
| download | bcm5719-llvm-8628bb0491cfbef98c866110d09a5c81caed6095.tar.gz bcm5719-llvm-8628bb0491cfbef98c866110d09a5c81caed6095.zip | |
[ARM] VQSUB instruction
Same as VQADD, VQSUB can be selected from llvm.ssub.sat intrinsics.
Differential Revision: https://reviews.llvm.org/D68567
llvm-svn: 374377
Diffstat (limited to 'llvm/lib/Target/ARM')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrMVE.td | 8 |
2 files changed, 10 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index 90b709867fe..d8b2c55eefe 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -267,6 +267,8 @@ void ARMTargetLowering::addMVEVectorTypes(bool HasMVEFP) { setOperationAction(ISD::BSWAP, VT, Legal); setOperationAction(ISD::SADDSAT, VT, Legal); setOperationAction(ISD::UADDSAT, VT, Legal); + setOperationAction(ISD::SSUBSAT, VT, Legal); + setOperationAction(ISD::USUBSAT, VT, Legal); // No native support for these. setOperationAction(ISD::UDIV, VT, Expand); diff --git a/llvm/lib/Target/ARM/ARMInstrMVE.td b/llvm/lib/Target/ARM/ARMInstrMVE.td index 28a32e1263d..80b45ce8914 100644 --- a/llvm/lib/Target/ARM/ARMInstrMVE.td +++ b/llvm/lib/Target/ARM/ARMInstrMVE.td @@ -1567,6 +1567,14 @@ let Predicates = [HasMVEInt] in { foreach VT = [instr.VT] in def : Pat<(VT (saddsat (VT MQPR:$Qm), (VT MQPR:$Qn))), (VT (instr (VT MQPR:$Qm), (VT MQPR:$Qn)))>; + foreach instr = [MVE_VQSUBu8, MVE_VQSUBu16, MVE_VQSUBu32] in + foreach VT = [instr.VT] in + def : Pat<(VT (usubsat (VT MQPR:$Qm), (VT MQPR:$Qn))), + (VT (instr (VT MQPR:$Qm), (VT MQPR:$Qn)))>; + foreach instr = [MVE_VQSUBs8, MVE_VQSUBs16, MVE_VQSUBs32] in + foreach VT = [instr.VT] in + def : Pat<(VT (ssubsat (VT MQPR:$Qm), (VT MQPR:$Qn))), + (VT (instr (VT MQPR:$Qm), (VT MQPR:$Qn)))>; } |

