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authorEvan Cheng <evan.cheng@apple.com>2009-11-14 02:55:43 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-11-14 02:55:43 +0000
commit6ad7da96fefb4364aaa8dfb8c695511bdaaac85d (patch)
tree51697f1065fb2058aff63c04fc692cc5caf13917 /llvm/lib/Target/ARM
parente598a56d30386bd0e52d0be087ac5e7b6ee8b3e9 (diff)
downloadbcm5719-llvm-6ad7da96fefb4364aaa8dfb8c695511bdaaac85d.tar.gz
bcm5719-llvm-6ad7da96fefb4364aaa8dfb8c695511bdaaac85d.zip
- Change TargetInstrInfo::reMaterialize to pass in TargetRegisterInfo.
- If destination is a physical register and it has a subreg index, use the sub-register instead. This fixes PR5423. llvm-svn: 88745
Diffstat (limited to 'llvm/lib/Target/ARM')
-rw-r--r--llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp9
-rw-r--r--llvm/lib/Target/ARM/ARMBaseInstrInfo.h3
-rw-r--r--llvm/lib/Target/ARM/ARMInstrInfo.cpp6
-rw-r--r--llvm/lib/Target/ARM/ARMInstrInfo.h3
4 files changed, 15 insertions, 6 deletions
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
index 868d31dbe0e..7925101d5a9 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -921,8 +921,15 @@ void ARMBaseInstrInfo::
reMaterialize(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I,
unsigned DestReg, unsigned SubIdx,
- const MachineInstr *Orig) const {
+ const MachineInstr *Orig,
+ const TargetRegisterInfo *TRI) const {
DebugLoc dl = Orig->getDebugLoc();
+
+ if (SubIdx && TargetRegisterInfo::isPhysicalRegister(DestReg)) {
+ DestReg = TRI->getSubReg(DestReg, SubIdx);
+ SubIdx = 0;
+ }
+
unsigned Opcode = Orig->getOpcode();
switch (Opcode) {
default: {
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.h b/llvm/lib/Target/ARM/ARMBaseInstrInfo.h
index 682db0506e1..29855e2c616 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.h
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.h
@@ -267,7 +267,8 @@ public:
virtual void reMaterialize(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned DestReg, unsigned SubIdx,
- const MachineInstr *Orig) const;
+ const MachineInstr *Orig,
+ const TargetRegisterInfo *TRI) const;
virtual bool isIdentical(const MachineInstr *MI, const MachineInstr *Other,
const MachineRegisterInfo *MRI) const;
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.cpp b/llvm/lib/Target/ARM/ARMInstrInfo.cpp
index 5e5b718dd72..87bb12b5115 100644
--- a/llvm/lib/Target/ARM/ARMInstrInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMInstrInfo.cpp
@@ -81,8 +81,8 @@ bool ARMInstrInfo::BlockHasNoFallThrough(const MachineBasicBlock &MBB) const {
void ARMInstrInfo::
reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
- unsigned DestReg, unsigned SubIdx,
- const MachineInstr *Orig) const {
+ unsigned DestReg, unsigned SubIdx, const MachineInstr *Orig,
+ const TargetRegisterInfo *TRI) const {
DebugLoc dl = Orig->getDebugLoc();
unsigned Opcode = Orig->getOpcode();
switch (Opcode) {
@@ -100,6 +100,6 @@ reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
}
}
- return ARMBaseInstrInfo::reMaterialize(MBB, I, DestReg, SubIdx, Orig);
+ return ARMBaseInstrInfo::reMaterialize(MBB, I, DestReg, SubIdx, Orig, TRI);
}
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.h b/llvm/lib/Target/ARM/ARMInstrInfo.h
index 9b9c0c7ce0f..431957787db 100644
--- a/llvm/lib/Target/ARM/ARMInstrInfo.h
+++ b/llvm/lib/Target/ARM/ARMInstrInfo.h
@@ -37,7 +37,8 @@ public:
void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
unsigned DestReg, unsigned SubIdx,
- const MachineInstr *Orig) const;
+ const MachineInstr *Orig,
+ const TargetRegisterInfo *TRI) const;
/// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
/// such, whenever a client has an instance of instruction info, it should
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