diff options
| author | Jim Grosbach <grosbach@apple.com> | 2010-11-10 23:18:49 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2010-11-10 23:18:49 +0000 |
| commit | 58ef598cd1f372bf5d219add6d25f26c5ccfe4af (patch) | |
| tree | 55cef4bfa220f650845d820b2676ac2267fb13bd /llvm/lib/Target/ARM | |
| parent | 378ed7f3e71921f52f34ebef4492007a707458d1 (diff) | |
| download | bcm5719-llvm-58ef598cd1f372bf5d219add6d25f26c5ccfe4af.tar.gz bcm5719-llvm-58ef598cd1f372bf5d219add6d25f26c5ccfe4af.zip | |
Fix ARM encoding of non-return LDM instructions.
llvm-svn: 118732
Diffstat (limited to 'llvm/lib/Target/ARM')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrFormats.td | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrInfo.td | 13 |
2 files changed, 11 insertions, 4 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrFormats.td b/llvm/lib/Target/ARM/ARMInstrFormats.td index ddf0c82e556..f03ef56db8b 100644 --- a/llvm/lib/Target/ARM/ARMInstrFormats.td +++ b/llvm/lib/Target/ARM/ARMInstrFormats.td @@ -943,7 +943,7 @@ class AXI4ld<dag oops, dag iops, IndexMode im, Format f, InstrItinClass itin, bits<16> dsts; bits<4> Rn; let Inst{27-25} = 0b100; - let Inst{22} = 0; // S bit + let Inst{24-22} = 0b010; let Inst{20} = 1; // L bit let Inst{19-16} = Rn; let Inst{15-0} = dsts; diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td index 9865ee5e543..f36a9fde06f 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.td +++ b/llvm/lib/Target/ARM/ARMInstrInfo.td @@ -1186,7 +1186,6 @@ let isReturn = 1, isTerminator = 1, isBarrier = 1, mayLoad = 1, "$Rn = $wb", []> { bits<4> p; let Inst{31-28} = p; - let Inst{24-23} = 0b01; let Inst{21} = 1; } @@ -1709,13 +1708,21 @@ let mayLoad = 1, neverHasSideEffects = 1, hasExtraDefRegAllocReq = 1, def LDM : AXI4ld<(outs), (ins GPR:$Rn, ldstm_mode:$amode, pred:$p, reglist:$dsts, variable_ops), IndexModeNone, LdStMulFrm, IIC_iLoad_m, - "ldm${amode}${p}\t$Rn, $dsts", "", []>; + "ldm${amode}${p}\t$Rn, $dsts", "", []> { + bits<4> p; + let Inst{31-28} = p; + let Inst{21} = 0; +} def LDM_UPD : AXI4ld<(outs GPR:$wb), (ins GPR:$Rn, ldstm_mode:$amode, pred:$p, reglist:$dsts, variable_ops), IndexModeUpd, LdStMulFrm, IIC_iLoad_mu, "ldm${amode}${p}\t$Rn!, $dsts", - "$Rn = $wb", []>; + "$Rn = $wb", []> { + bits<4> p; + let Inst{31-28} = p; + let Inst{21} = 1; +} } // mayLoad, neverHasSideEffects, hasExtraDefRegAllocReq let mayStore = 1, neverHasSideEffects = 1, hasExtraSrcRegAllocReq = 1, |
