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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-09-14 20:43:16 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-09-14 20:43:16 +0000 |
| commit | 1b9fc8ed659589ee2f1d010adfd63f3d890c6ec3 (patch) | |
| tree | 27b082ad9831ad1d7dbddbd99b4c07e76e1db43e /llvm/lib/Target/ARM | |
| parent | 0ac172d8ede295c30946f6af2dafb68c7c7aa201 (diff) | |
| download | bcm5719-llvm-1b9fc8ed659589ee2f1d010adfd63f3d890c6ec3.tar.gz bcm5719-llvm-1b9fc8ed659589ee2f1d010adfd63f3d890c6ec3.zip | |
Finish renaming remaining analyzeBranch functions
llvm-svn: 281535
Diffstat (limited to 'llvm/lib/Target/ARM')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMBaseInstrInfo.h | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp index 9c6f03d8730..6aa060ae0d9 100644 --- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -382,7 +382,7 @@ bool ARMBaseInstrInfo::analyzeBranch(MachineBasicBlock &MBB, } -unsigned ARMBaseInstrInfo::RemoveBranch(MachineBasicBlock &MBB, +unsigned ARMBaseInstrInfo::removeBranch(MachineBasicBlock &MBB, int *BytesRemoved) const { assert(!BytesRemoved && "code size not handled"); @@ -453,7 +453,7 @@ unsigned ARMBaseInstrInfo::insertBranch(MachineBasicBlock &MBB, } bool ARMBaseInstrInfo:: -ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const { +reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const { ARMCC::CondCodes CC = (ARMCC::CondCodes)(int)Cond[0].getImm(); Cond[0].setImm(ARMCC::getOppositeCondition(CC)); return false; diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.h b/llvm/lib/Target/ARM/ARMBaseInstrInfo.h index 5608cc7ccfb..a42ed0c392f 100644 --- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.h +++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.h @@ -124,7 +124,7 @@ public: MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify = false) const override; - unsigned RemoveBranch(MachineBasicBlock &MBB, + unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved = nullptr) const override; unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, @@ -132,7 +132,7 @@ public: int *BytesAdded = nullptr) const override; bool - ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override; + reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override; // Predication support. bool isPredicated(const MachineInstr &MI) const override; |
