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authorOwen Anderson <resistor@mac.com>2011-09-19 23:57:20 +0000
committerOwen Anderson <resistor@mac.com>2011-09-19 23:57:20 +0000
commit163be01d694312d6261be9cb3274287554b7eafa (patch)
tree839c5ae079222d57e2da4d877235b3e898dca992 /llvm/lib/Target/ARM
parent708d38e06ae8a2cc216df133de32e00c82e95b3b (diff)
downloadbcm5719-llvm-163be01d694312d6261be9cb3274287554b7eafa.tar.gz
bcm5719-llvm-163be01d694312d6261be9cb3274287554b7eafa.zip
tMOVSr is not allowed in an IT block either.
llvm-svn: 140104
Diffstat (limited to 'llvm/lib/Target/ARM')
-rw-r--r--llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp1
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 6e4bb8c64cb..6be49169b4c 100644
--- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -449,6 +449,7 @@ ThumbDisassembler::AddThumbPredicate(MCInst &MI) const {
case ARM::t2CPS3p:
case ARM::t2CPS2p:
case ARM::t2CPS1p:
+ case ARM::tMOVSr:
// Some instructions (mostly conditional branches) are not
// allowed in IT blocks.
if (!ITBlock.empty())
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