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| author | Artyom Skrobov <Artyom.Skrobov@arm.com> | 2015-10-29 13:56:19 +0000 |
|---|---|---|
| committer | Artyom Skrobov <Artyom.Skrobov@arm.com> | 2015-10-29 13:56:19 +0000 |
| commit | 0ff1ce4038f3e228ae728dd74e539e126bd5447c (patch) | |
| tree | a2adbc413fe21f370737f332020be8cf7bd53a46 /llvm/lib/Target/ARM | |
| parent | 7d557910c6aa04396235da74bc6fe5341b0cc5c8 (diff) | |
| download | bcm5719-llvm-0ff1ce4038f3e228ae728dd74e539e126bd5447c.tar.gz bcm5719-llvm-0ff1ce4038f3e228ae728dd74e539e126bd5447c.zip | |
Recognize that ARM1176JZ[F]-S support TrustZone
Summary:
ARMv6KZ cores were set up incorrectly in ARM.td; also, the SMI mnemonic
(the old name for SMC, as defined in ARMv6KZ) wasn't supported.
Reviewers: jmolloy, rengolin
Subscribers: aemerson, rengolin, llvm-commits
Differential Revision: http://reviews.llvm.org/D14154
llvm-svn: 251627
Diffstat (limited to 'llvm/lib/Target/ARM')
| -rw-r--r-- | llvm/lib/Target/ARM/ARM.td | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrInfo.td | 1 |
2 files changed, 4 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td index 26415be1446..e7423c3dcf8 100644 --- a/llvm/lib/Target/ARM/ARM.td +++ b/llvm/lib/Target/ARM/ARM.td @@ -360,8 +360,10 @@ def : Processor<"sc000", ARMV6Itineraries, [HasV6MOps, FeatureNoARM, FeatureDB, FeatureMClass]>; // V6K Processors. -def : Processor<"arm1176jz-s", ARMV6Itineraries, [HasV6KOps]>; +def : Processor<"arm1176jz-s", ARMV6Itineraries, [HasV6KOps, + FeatureTrustZone]>; def : Processor<"arm1176jzf-s", ARMV6Itineraries, [HasV6KOps, FeatureVFP2, + FeatureTrustZone, FeatureHasSlowFPVMLx]>; def : Processor<"mpcorenovfp", ARMV6Itineraries, [HasV6KOps]>; def : Processor<"mpcore", ARMV6Itineraries, [HasV6KOps, FeatureVFP2, diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td index 9506e1ebef7..9962fc94766 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.td +++ b/llvm/lib/Target/ARM/ARMInstrInfo.td @@ -2329,6 +2329,7 @@ def SMC : ABI<0b0001, (outs), (ins imm0_15:$opt), NoItinerary, "smc", "\t$opt", let Inst{23-4} = 0b01100000000000000111; let Inst{3-0} = opt; } +def : MnemonicAlias<"smi", "smc">; // Supervisor Call (Software Interrupt) let isCall = 1, Uses = [SP] in { |
