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| author | Tim Northover <tnorthover@apple.com> | 2014-05-16 09:41:48 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2014-05-16 09:41:48 +0000 |
| commit | 28aef9e05d6dca63b412e9a16311f9fd0040a012 (patch) | |
| tree | c09c5691c5cd7807621f4e8e80ef898e7a59f410 /llvm/lib/Target/ARM64 | |
| parent | 488e6206df40dc85f76c61417574e9146956fc44 (diff) | |
| download | bcm5719-llvm-28aef9e05d6dca63b412e9a16311f9fd0040a012.tar.gz bcm5719-llvm-28aef9e05d6dca63b412e9a16311f9fd0040a012.zip | |
ARM64: disable printing of "fcmXY ..., #0" aliases
The canonical syntax is "fcmXY ..., #0.0".
This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).
llvm-svn: 208968
Diffstat (limited to 'llvm/lib/Target/ARM64')
| -rw-r--r-- | llvm/lib/Target/ARM64/ARM64InstrFormats.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM64/ARM64InstrFormats.td b/llvm/lib/Target/ARM64/ARM64InstrFormats.td index 11d2e4312c7..c06c3487a7b 100644 --- a/llvm/lib/Target/ARM64/ARM64InstrFormats.td +++ b/llvm/lib/Target/ARM64/ARM64InstrFormats.td @@ -5322,9 +5322,9 @@ multiclass SIMDCmpTwoScalarSD<bit U, bit S, bits<5> opc, string asm, def v1i32rz : BaseSIMDCmpTwoScalar<U, {S,0}, opc, FPR32, asm, "0.0">; def : InstAlias<asm # " $Rd, $Rn, #0", - (!cast<Instruction>(NAME # v1i64rz) FPR64:$Rd, FPR64:$Rn)>; + (!cast<Instruction>(NAME # v1i64rz) FPR64:$Rd, FPR64:$Rn), 0>; def : InstAlias<asm # " $Rd, $Rn, #0", - (!cast<Instruction>(NAME # v1i32rz) FPR32:$Rd, FPR32:$Rn)>; + (!cast<Instruction>(NAME # v1i32rz) FPR32:$Rd, FPR32:$Rn), 0>; def : Pat<(v1i64 (OpNode (v1f64 FPR64:$Rn))), (!cast<Instruction>(NAME # v1i64rz) FPR64:$Rn)>; |
