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| author | Kevin Qin <Kevin.Qin@arm.com> | 2014-04-25 09:44:20 +0000 |
|---|---|---|
| committer | Kevin Qin <Kevin.Qin@arm.com> | 2014-04-25 09:44:20 +0000 |
| commit | 022d395c9c9a75d7fd6f1833882e75127017bfd2 (patch) | |
| tree | 08ad79bfb0386f395b24369aa4bf99053f45431d /llvm/lib/Target/ARM64 | |
| parent | 0e7b07704ef6c1818b0c0e632cf095a5471222b8 (diff) | |
| download | bcm5719-llvm-022d395c9c9a75d7fd6f1833882e75127017bfd2.tar.gz bcm5719-llvm-022d395c9c9a75d7fd6f1833882e75127017bfd2.zip | |
[ARM64] Add RUN lines for "–target arm64 –mattr=-fp-armv8" on AArch64 no-fp test.
This patch is a supplement of implementing predicate of FP, enabling aarch64 backend
no-fp tests on arm64 target for verification. During this, one bug is exposed and
fixed by this patch.
llvm-svn: 207215
Diffstat (limited to 'llvm/lib/Target/ARM64')
| -rw-r--r-- | llvm/lib/Target/ARM64/ARM64ISelLowering.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/ARM64/ARM64ISelLowering.cpp b/llvm/lib/Target/ARM64/ARM64ISelLowering.cpp index 37eccb1499c..3cdd2db4ea5 100644 --- a/llvm/lib/Target/ARM64/ARM64ISelLowering.cpp +++ b/llvm/lib/Target/ARM64/ARM64ISelLowering.cpp @@ -5812,12 +5812,12 @@ EVT ARM64TargetLowering::getOptimalMemOpType(uint64_t Size, unsigned DstAlign, // addressing mode). Just do two i64 store of zero-registers. bool Fast; const Function *F = MF.getFunction(); - if (!IsMemset && Size >= 16 && + if (Subtarget->hasFPARMv8() && !IsMemset && Size >= 16 && !F->getAttributes().hasAttribute(AttributeSet::FunctionIndex, Attribute::NoImplicitFloat) && (memOpAlign(SrcAlign, DstAlign, 16) || - (allowsUnalignedMemoryAccesses(MVT::v2i64, 0, &Fast) && Fast))) - return MVT::v2i64; + (allowsUnalignedMemoryAccesses(MVT::f128, 0, &Fast) && Fast))) + return MVT::f128; return Size >= 8 ? MVT::i64 : MVT::i32; } |

