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authorBob Wilson <bob.wilson@apple.com>2010-06-29 16:25:11 +0000
committerBob Wilson <bob.wilson@apple.com>2010-06-29 16:25:11 +0000
commit83b993a977d4ed6689c5e4f9dbf4e0bab04b0f2d (patch)
tree3eae46fb1e5b656fe664f6c681a841108f934c77 /llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
parent6964ab16f695ef9a7aec3ec03cb6917a65b7dd9c (diff)
downloadbcm5719-llvm-83b993a977d4ed6689c5e4f9dbf4e0bab04b0f2d.tar.gz
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The t2MOVi16 and t2MOVTi16 instructions do not set CPSR. Trying to add
a CPSR operand to them causes an assertion failure, so apparently these instructions haven't been getting a lot of use. llvm-svn: 107147
Diffstat (limited to 'llvm/lib/Target/ARM/Thumb2InstrInfo.cpp')
-rw-r--r--llvm/lib/Target/ARM/Thumb2InstrInfo.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp b/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
index 89e9eacf64c..7e2814f7cd5 100644
--- a/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
+++ b/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
@@ -224,14 +224,14 @@ void llvm::emitT2RegPlusImmediate(MachineBasicBlock &MBB,
// Use a movw to materialize the 16-bit constant.
BuildMI(MBB, MBBI, dl, TII.get(ARM::t2MOVi16), DestReg)
.addImm(NumBytes)
- .addImm((unsigned)Pred).addReg(PredReg).addReg(0);
+ .addImm((unsigned)Pred).addReg(PredReg);
Fits = true;
} else if ((NumBytes & 0xffff) == 0) {
// Use a movt to materialize the 32-bit constant.
BuildMI(MBB, MBBI, dl, TII.get(ARM::t2MOVTi16), DestReg)
.addReg(DestReg)
.addImm(NumBytes >> 16)
- .addImm((unsigned)Pred).addReg(PredReg).addReg(0);
+ .addImm((unsigned)Pred).addReg(PredReg);
Fits = true;
}
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