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authorJim Grosbach <grosbach@apple.com>2010-03-10 19:59:47 +0000
committerJim Grosbach <grosbach@apple.com>2010-03-10 19:59:47 +0000
commit77f781405d734729afb4c34e15ab1d4e16f5a8c4 (patch)
treef92993aaeb3c5372b2935bc73f3b58231e8ad47f /llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp
parente9b361b2e6efe7e632cd21c48327bc28306fb3cd (diff)
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comment why we use custom epilogue for t1 functions using vaargs.
llvm-svn: 98182
Diffstat (limited to 'llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp')
-rw-r--r--llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp5
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp b/llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp
index 6215d2fa82c..49fd3fa05be 100644
--- a/llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp
+++ b/llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp
@@ -854,6 +854,11 @@ void Thumb1RegisterInfo::emitEpilogue(MachineFunction &MF,
}
if (VARegSaveSize) {
+ // Unlike T2 and ARM mode, the T1 pop instruction cannot restore
+ // to LR, and we can't pop the value directly to the PC since
+ // we need to update the SP after popping the value. Therefore, we
+ // pop the old LR into R3 as a temporary.
+
// Move back past the callee-saved register restoration
while (MBBI != MBB.end() && isCSRestore(MBBI, CSRegs))
++MBBI;
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