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| author | Jim Grosbach <grosbach@apple.com> | 2011-06-29 20:26:39 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-06-29 20:26:39 +0000 |
| commit | d86f34d6316c2bfa1a0e2e2cb385a0c6573434ff (patch) | |
| tree | 867a40a5c00bfb9b33af189160fc3a175a23a38f /llvm/lib/Target/ARM/Thumb1InstrInfo.cpp | |
| parent | 326701e2c721f60e46b75e9b9ac97e3cdf07f018 (diff) | |
| download | bcm5719-llvm-d86f34d6316c2bfa1a0e2e2cb385a0c6573434ff.tar.gz bcm5719-llvm-d86f34d6316c2bfa1a0e2e2cb385a0c6573434ff.zip | |
Refactor away tSpill and tRestore pseudos in ARM backend.
The tSpill and tRestore instructions are just copies of the tSTRspi and
tLDRspi instructions, respectively. Just use those directly instead.
llvm-svn: 134092
Diffstat (limited to 'llvm/lib/Target/ARM/Thumb1InstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/Thumb1InstrInfo.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/Thumb1InstrInfo.cpp b/llvm/lib/Target/ARM/Thumb1InstrInfo.cpp index b430ab3a6a6..e5d3a89dab8 100644 --- a/llvm/lib/Target/ARM/Thumb1InstrInfo.cpp +++ b/llvm/lib/Target/ARM/Thumb1InstrInfo.cpp @@ -75,7 +75,7 @@ storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, MachineMemOperand::MOStore, MFI.getObjectSize(FI), MFI.getObjectAlignment(FI)); - AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tSpill)) + AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tSTRspi)) .addReg(SrcReg, getKillRegState(isKill)) .addFrameIndex(FI).addImm(0).addMemOperand(MMO)); } @@ -104,7 +104,7 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, MachineMemOperand::MOLoad, MFI.getObjectSize(FI), MFI.getObjectAlignment(FI)); - AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tRestore), DestReg) + AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tLDRspi), DestReg) .addFrameIndex(FI).addImm(0).addMemOperand(MMO)); } } |
