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authorJim Grosbach <grosbach@apple.com>2011-06-30 22:10:46 +0000
committerJim Grosbach <grosbach@apple.com>2011-06-30 22:10:46 +0000
commitb98ab91e39fb9b7065b635f19e57a387f6097362 (patch)
tree2d76a907e5b935e82529c9ab0d07251fdfe9d1d0 /llvm/lib/Target/ARM/Thumb1InstrInfo.cpp
parentf166ab447e3a24225ed2f9a95c550d0847be8a30 (diff)
downloadbcm5719-llvm-b98ab91e39fb9b7065b635f19e57a387f6097362.tar.gz
bcm5719-llvm-b98ab91e39fb9b7065b635f19e57a387f6097362.zip
Thumb1 register to register MOV instruction is predicable.
Fix a FIXME and allow predication (in Thumb2) for the T1 register to register MOV instructions. This allows some better codegen with if-conversion (as seen in the test updates), plus it lays the groundwork for pseudo-izing the tMOVCC instructions. llvm-svn: 134197
Diffstat (limited to 'llvm/lib/Target/ARM/Thumb1InstrInfo.cpp')
-rw-r--r--llvm/lib/Target/ARM/Thumb1InstrInfo.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/Thumb1InstrInfo.cpp b/llvm/lib/Target/ARM/Thumb1InstrInfo.cpp
index e5d3a89dab8..614ba816b1e 100644
--- a/llvm/lib/Target/ARM/Thumb1InstrInfo.cpp
+++ b/llvm/lib/Target/ARM/Thumb1InstrInfo.cpp
@@ -46,8 +46,8 @@ void Thumb1InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
else if (tDest)
Opc = ARM::tMOVgpr2tgpr;
- BuildMI(MBB, I, DL, get(Opc), DestReg)
- .addReg(SrcReg, getKillRegState(KillSrc));
+ AddDefaultPred(BuildMI(MBB, I, DL, get(Opc), DestReg)
+ .addReg(SrcReg, getKillRegState(KillSrc)));
assert(ARM::GPRRegClass.contains(DestReg, SrcReg) &&
"Thumb1 can only copy GPR registers");
}
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